IP Library Granted Patent US 8,072,720
Granted Patent B2
US 8,072,720 · App. 12/078,977 · Granted Dec 6, 2011

Electrostatic protection circuit

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Quick Facts
Patent No.
US 8,072,720
App. No.
12/078,977
Granted
Dec 6, 2011
Kind
B2
Abstract

An electrostatic protection circuit that affords protection without effecting transfer of an ordinary output signal includes an output terminal; a ground terminal; a first N-channel transistor having its drain and source connected between the output terminal and the ground terminal GND; a first electrostatic protection element connecting the output terminal and the ground terminal; and a second electrostatic protection element connected the drain and gate of the first N-channel transistor. The second N-channel transistor is connected to the gate of the first N-channel transistor. The gate potential of the first N-channel transistor rises and the gate-to-drain voltage of the first N-channel transistor is limited to a value below a prescribed value by a current that flows into the second electrostatic protection element owing to application of static electricity to the output terminal, and resistance of the second N-channel transistor, which is the ON state, as seen from the gate of the first N-channel transistor.

Claims (56)

1. An electrostatic protection circuit comprising:

a first terminal for outputting a signal;

a second terminal for receiving power or a ground potential;

a first MOS (metal-oxide semiconductor) transistor including a drain and a source coupled to said first and second terminals, respectively;

a first electrostatic protection element connecting said first and second terminals; and

a second electrostatic protection element connecting a gate of said first MOS transistor and either of said first terminal and the drain of said first MOS transistor,

wherein said first terminal comprises an output terminal, said second terminal comprises a power source terminal or ground terminal, and said electrostatic protection circuit further comprises an output driver circuit having said output terminal as its output,

said first MOS transistor being included in said output driver circuit,

wherein said output driver circuit includes a differential amplifier circuit for output purposes, and

wherein said first MOS transistor comprises one transistor of a differential pair in said differential amplifier circuit.

2. An electrostatic protection circuit comprising:

a first terminal for outputting a signal;

a second terminal for receiving power or a ground potential;

a first MOS (metal-oxide semiconductor) transistor including a drain and a source coupled to said first and second terminals, respectively;

a first electrostatic protection element connecting said first and second terminals; and

a second electrostatic protection element connecting a gate of said first MOS transistor and either of said first terminal and the drain of said first MOS transistor,

wherein said first terminal comprises an output terminal said second terminal comprises a power source terminal or ground terminal, and said electrostatic protection circuit further comprises an output driver circuit having said output terminal as its output,

said first MOS transistor being included in said output driver circuit,

wherein said output driver circuit includes a differential amplifier circuit for output purposes, and

wherein said first MOS transistor comprises a current-source transistor connected to sources of a transistor pair in said differential amplifier circuit.

3. An electrostatic protection circuit comprising:

a first terminal;

a second terminal;

a first MOS (metal-oxide semiconductor) transistor of a differential pair of transistors for output of a signal through the first terminal, the first MOS transistor including a drain and a source connected between said first and second terminals;

a first electrostatic protection element connecting said first and second terminals; and

a second electrostatic protection element connecting a gate of said first MOS transistor to one of said first and second terminals,

said one of said first and second terminals being connected to the drain of said first MOS transistor.

4. The electrostatic protection circuit according to claim 3 , wherein an internal circuit is connected to the gate of said first MOS transistor; and

gate-to-drain voltage of said first MOS transistor is limited to a value below a prescribed value by a current that flows into said second electrostatic protection element owing to application of static electricity to the first terminal, and a resistance of the internal circuit as seen from the gate of said first MOS transistor.

5. The electrostatic protection circuit according to claim 4 , wherein the internal circuit includes a second MOS transistor of the same conductivity type as that of said first MOS transistor, said second MOS transistor having a drain connected to the gate of said first MOS transistor and a source connected to a ground terminal; and

the resistance of the internal circuit includes a drain-to-source resistance component of said second MOS transistor.

6. The electrostatic protection circuit according to claim 3 , wherein said first terminal comprises an output terminal, said second terminal comprises a power source terminal or ground terminal, and said electrostatic protection circuit further comprises an output driver circuit having said output terminal as its output;

said first MOS transistor being included in said output driver circuit.

7. The electrostatic protection circuit according to claim 6 , wherein said output driver circuit includes a differential amplifier circuit for output purposes; and

said first MOS transistor comprises one transistor of a differential pair in said differential amplifier circuit.

8. The electrostatic protection circuit according to claim 6 , wherein said output driver circuit includes a differential amplifier circuit for output purposes; and

said first MOS transistor comprises a current-source transistor connected to sources of a transistor pair in said differential amplifier circuit.

9. The electrostatic protection circuit according to claim 3 , wherein said one of the first and second terminals is indirectly connected to the drain of said first MOS transistor via an impedance or coupler element.

10. The electrostatic protection circuit according to claim 9 , wherein said impedance or coupler element comprises a capacitor.

11. The electrostatic protection circuit according to claim 3 , wherein said one of the first and second terminals is indirectly connected to the drain of said first MOS transistor via a transistor constituting a differential pair.

12. The electrostatic protection circuit according to claim 3 , wherein said first MOS transistor constitutes one of a differential pair transistors.

13. A semiconductor device having the electrostatic protection circuit set forth in claim 3 .

14. An electrostatic protection circuit comprising:

a first terminal for outputting a signal;

a second terminal for receiving power or a ground potential;

a first MOS (metal-oxide semiconductor) transistor including a drain and a source coupled to said first and second terminals, respectively;

a first electrostatic protection element connecting said first and second terminals;

a second electrostatic protection element connecting a gate of said first MOS transistor and either of said first terminal and the drain of said first MOS transistor; and a differential pair of transistors for output to the first terminal, the differential pair of transistors comprising the first MOS transistor.

15. An electrostatic protection circuit comprising:

a first terminal for outputting a signal;

a second terminal for receiving power or a ground potential;

a first MOS (metal-oxide semiconductor) transistor including a drain and a source coupled to said first and second terminals respectively;

a first electrostatic protection element connecting said first and second terminals;

a second electrostatic protection element connecting a gate of said first MOS transistor and either of said first terminal and the drain of said first MOS transistor; and

an output driver circuit including a differential amplifier circuit for output to the first terminal as the output terminal,

wherein a one of first and second terminals is connected to the drain of the first MOS transistor through impedance or a coupler element.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0497 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2008
From: OKUSHIMA, MOTOTSUGU
To: NEC ELECTRONICS CORPORATION
Reel/Frame 020815/0538 →