Lateral undercut of metal gate in SOI device

1. A method for making a semiconductor device, comprising:

forming a gate dielectric on a second semiconductor layer on an insulator layer that is on a first semiconductor layer;

forming a metal gate electrode on the gate dielectric, the metal gate electrode having a first side and a second side;

removing portions of the metal gate electrode on the first side and the second side to form curved lateral undercuts extending into a center of the metal gates thickness and tapering off towards a top and a bottom surface of the metal gate said curved lateral undercuts having a depth laterally measured from an outermost edge of the metal gate to a greatest depth of the lateral undercut;

forming source/drain regions of the second semiconductor layer on the first and second side of the metal gate electrode, the source/drain regions having extensions a distance beneath the metal gate electrode; and

wherein the depth of the lateral undercuts are at least about one-fourth the distance of the source/drain region extensions.

2. The method of claim 1 , wherein forming said gate dielectric and said metal gate electrode are formed by a metal comprising:

forming a layer of dielectric material on the second semiconductor layer;

forming a metal layer on the layer of dielectric material;

removing portions of the metal layer to leave behind the metal gate electrode; and

removing portions of the layer of dielectric material to leave behind the gate dielectric.

3. The method of claim 2 , further comprising:

determining a desired threshold voltage for the semiconductor device;

determining a thickness of the metal gate electrode that results in the desired threshold voltage; and

wherein forming a metal layer on the layer of dielectric material comprises forming the metal layer with a thickness about equal to the thickness of the metal gate electrode that results in the desired threshold voltage.

4. The method of claim 2 , wherein the layer of dielectric material comprises a high-k dielectric material and wherein the metal layer on the layer of dielectric material comprises a material selected from the group consisting of a p-type metal, an n-type metal, and a mid-gap metal.