IP Library Granted Patent US 7,821,101
Granted Patent B2
US 7,821,101 · App. 12/081,194 · Granted Oct 26, 2010

Semiconductor device including capacitor including upper electrode covered with high density insulation film and production method thereof

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Quick Facts
Patent No.
US 7,821,101
App. No.
12/081,194
Granted
Oct 26, 2010
Kind
B2
Abstract

A semiconductor device includes a lower electrode provided on a semiconductor substrate, an upper electrode provided on the lower electrode to overlap a part of the lower electrode, a first insulating film provided between the lower electrode and the upper electrode, and a second insulating film provided in contact with an upper part of the upper electrode and on the upper part of the lower electrode, and having a density higher than that of the first insulating film, the second insulating film covering a side surface and a top surface of the upper electrode.

Claims (28)

1. A semiconductor device, comprising:

a lower electrode provided on a semiconductor substrate;

an upper electrode provided on the lower electrode to overlap a part of the lower electrode;

a first insulating film provided between the lower electrode and the upper electrode; and

a second insulating film provided in contact with an upper part of the upper electrode and on an upper part of the lower electrode, and having a density greater than a density of the first insulating film, the second insulating film covering a side surface and a top surface of the upper electrode.

2. The semiconductor device according to claim 1 , wherein, in plan view, a groove is provided in the first insulating film along an edge of the upper electrode, and the second insulating film fills the groove.

3. The semiconductor device according to claim 1 , wherein the second insulating film and the first insulating film are selectively provided on the upper part of the lower electrode.

4. The semiconductor device according to claim 2 , further comprising:

a low dielectric constant interlayer insulating film provided on the second insulating film; and

a connecting plug that penetrates the first and second insulating films in a non-formation area of the upper electrode and connects with a top surface of the lower electrode,

wherein the lower electrode, the first insulating film, the upper electrode, the second insulating film, and the connecting plug are all covered by the low dielectric constant interlayer insulating film, and

wherein the second insulating film is provided between the connecting plug and the upper electrode, and is provided in contact with a side surface of the connecting plug.

5. The semiconductor device according to claim 4 , further comprising:

a stopper film provided on the semiconductor substrate and in contact with an under surface of the low dielectric constant interlayer insulating film,

wherein an etching rate of the second insulating film is less than an etching rate of the low dielectric constant interlayer insulating film and is greater than or equal to an etching rate of the stopper film.

6. The semiconductor device according to claim 1 , wherein a dielectric constant of the second insulating film is greater than a dielectric constant of the first insulating film.

7. The semiconductor device according to claim 6 , wherein constituent elements of the first insulating film are the same as constituent elements of the second insulating film.

8. The semiconductor device according to claim 7 , wherein each of the first insulating film and the second insulating film contains N and Si as the constituent elements and a content percentage of N of the second insulating film is greater than a content percentage of N of the first insulating film.

9. A semiconductor device, comprising:

a lower electrode formed on a semiconductor substrate;

a dielectric film formed on said lower electrode;

an upper electrode formed on a portion of said dielectric film such that said lower electrode and said dielectric film have a non-overlapped portion with said upper electrode;

an insulating film which covers the non-overlapped portion of said dielectric film and upper and side surfaces of said upper electrode, and includes an element same as an element included in said dielectric film, a volume of said element of said insulating film being greater than a volume of said element of said dielectric film, and a density of said insulating film being greater than a density of the dielectric film.

10. The device as claimed in claim 9 , wherein said upper electrode is provided inside a periphery of said lower electrode in a plan view.

11. The device as claimed in claim 10 , wherein a groove is formed in the dielectric film along an edge of the upper electrode, and the insulating film fills the groove.

12. The device as claimed in claim 10 , wherein the dielectric film is devoid of a groove along an edge of the upper electrode.

13. The semiconductor device according to claim 1 , wherein the first insulating film comprises an SiN film, and the second insulating film comprises an SiN film having a film density which is greater than a film density of the first insulating film.

14. The semiconductor device according to claim 1 , wherein, in a plan view, a groove is provided in the first insulating film along an edge of the upper electrode and directly adjacent to the edge of the upper electrode, and the second insulating film fills the groove.

Assignments (2)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0497 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2008
From: TAKEWAKI, TOSHIYUKI; OSHIDA, DAISUKE; ONUMA, TAKUJI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 020833/0230 →