Enhanced low noise amplifier

1. Amplifier for radio frequency signals comprising a first stage being connected between the input, a ground and an output and a second stage being connected between the output and a direct voltage source, and wherein said second stage provides a direct current path with a first inductor, the circuit further comprising a first capacitor connected in parallel with said direct current path and a second inductor series-connected with a second capacitor wherein the values of said first and second inductors and of said first and second capacitors are set to have predetermined ratios to amplify the signals within a first range of frequency and simultaneously attenuate the signals within a second range of frequency and wherein each of the couples of inductor and capacitor allows setting of respectively the central attenuation frequency and the central amplification frequency.

2. Amplifier according to claim 1 , wherein said direct current path comprises only the first inductor and said second inductor and second capacitor are series-connected between the direct voltage source and the output.

3. Amplifier according to claim 1 , wherein said direct current path comprises said first and second inductors series-connected between the direct voltage source and the output and said second capacitor is connected in parallel with one of said two inductors.

4. Amplifier according to claim 1 , wherein the value of said second inductor is not more than four times the value of said first inductor.

5. Amplifier according to claim 1 , wherein the value of said second capacitor is not more than ten times the value of said first inductor.

6. Amplifier according to claim 1 , comprising a first and a second tuneable components, the value of the first tuneable component determining the center of the first range of frequency and the value of the second tuneable component determining the center of the second range of frequency.

7. Amplifier according to claim 1 , comprising a first and a second tuneable component which values determines together in combination both the center of the first and second ranges of frequency.

8. Amplifier according to claim 6 , wherein at least one tuneable component is formed of several elementary components each series-connected with a controllable switch, the control of said switches determining the overall value of the tuneable component.

9. Amplifier according to claim 1 , wherein said circuit is adapted to receive a single input signal.

10. Amplifier according to claim 1 , wherein said circuit is adapted to receive a balanced input signal and to output a balanced signal.

11. Amplifier according to claim 7 , wherein at least one tuneable component is formed of several elementary components each series-connected with a controllable switch, the control of said switches determining the overall value of the tuneable component.

12. Receiver for digital television signals comprising an analog front end and a demodulation unit, characterized in that said analog front end comprises at least one amplifier for radio frequency signals comprising a first stage being connected between the input, a ground and an output and a second stage being connected between the output and a direct voltage source, and wherein said second stage provides a direct current path with a first inductor, the circuit further comprising a first capacitor connected in parallel with said direct current path and a second inductor series-connected with a second capacitor wherein the values of said first and second inductors and of said first and second capacitors are set to have predetermined ratios to amplify the signals within a first range of frequency and simultaneously attenuate the signals within a second range of frequency and wherein each of the couples of inductor and capacitor allows setting of respectively the central attenuation frequency and the central amplification frequency.

13. Receiver according to claim 12 , wherein said direct current path comprises only the first inductor and said second inductor and second capacitor are series-connected between the direct voltage source and the output.

14. Receiver according to claim 12 , wherein said direct current path comprises said first and second inductors series-connected between the direct voltage source and the output and said second capacitor is connected in parallel with one of said two inductors.

15. Receiver according to claim 12 , wherein the value of said second inductor is not more than four times the value of said first inductor.

16. Receiver according to claim 12 , wherein the value of said second capacitor is not more than ten times the value of said first inductor.

17. Receiver according to claim 12 , comprising a first and a second tuneable components, the value of the first tuneable component determining the center of the first range of frequency and the value of the second tuneable component determining the center of the second range of frequency.

18. Receiver according to claim 12 , comprising a first and a second tuneable component which values determines together in combination both the center of the first and second ranges of frequency.

19. Receiver according to claim 17 , wherein at least one tuneable component is formed of several elementary components each series-connected with a controllable switch, the control of said switches determining the overall value of the tuneable component.

20. Receiver according to claim 18 , wherein at least one tuneable component is formed of several elementary components each series-connected with a controllable switch, the control of said switches determining the overall value of the tuneable component.

21. Receiver according to claim 12 , wherein said circuit is adapted to receive a single input signal.

22. Receiver according to claim 12 , wherein said circuit is adapted to receive a balanced input signal and to output a balanced signal.