Electronic device and method for controlling current of a processor load by slewing clock frequency
View Patent ↗An electronic device comprises a voltage regulator supplying a current to a load such as a micro-controller unit. The load controls the current provided to the load from the voltage regulator. Preferably, the load controls the level of current supplied to the load upon start-up, thereby avoiding power surges being drawn by the load.
1. An electronic device comprising:
a voltage regulator and a frequency/clock generation circuit operably coupled to a processor load, the voltage regulator to supply a current to the processor load, wherein
the processor load is further configured to:
control the current drawn from the voltage regulator by an adjustment of the frequency/clock generation circuit,
determine whether the current supplied to the processor load is a final operating current, and
repeat the adjustment until the processor load determines that the current supplied has reached the final operating current.
2. An electronic device according to claim 1 wherein the current provided by the voltage regulator to the processor load is controlled upon start-up of the electronic device.
3. An electronic device according to claim 1 wherein the electronic device comprises one or more of: a micro-controller unit, a digital signal processor, an application specific integrated circuit, and other embedded controller.
4. An electronic device according to claim 3 wherein the processor load is operably coupled to a frequency/clock generation circuit and controls the current supplied to the electronic device by adjusting a frequency of operation of the electronic device.
5. An electronic device according to claim 4 wherein the frequency/clock generation circuit is a phase locked loop circuit, wherein the electronic device is arranged to control a dividing function of a PLL clock signal to adjust its frequency of operation.
6. An electronic device according to claim 5 , wherein the electronic device is arranged to monitor an operating frequency of the frequency/clock generation circuit used to generate the electronic device's frequency/clock rates and adjust a frequency of operation of the electronic device in response thereto.
7. An electronic device according to claim 4 , wherein a dividing function of the frequency/clock generation circuit is initially set on reset to a high value, to produce a low frequency of operation of the electronic device.
8. An electronic device according to claim 7 wherein an operating frequency of the electronic device is increased through reduction of the value of a dividing function.
9. An electronic device according to claim 8 further characterised by a pulse width modulation circuit operably coupled to the frequency/clock generation circuit to generate a pulse width signal to be applied to the frequency/clock generation circuit to vary an average frequency of operation of the electronic device.
10. An electronic device according to claim 9 wherein the electronic device changes a pulse width ratio of the pulse width signal to vary the average frequency of operation of the electronic device.
11. An electronic device according to claim 4 wherein the electronic device controls the clock frequency by limiting a rate of change of a current controlled oscillator value or voltage controlled oscillator value.
12. An electronic device according to claim 4 wherein the processor load controls the current supplied to the electronic device in a series of intermittent steps.
13. A method of controlling a current supplied to a processor load in an electronic device having a voltage regulator operably coupled to a frequency/clock generation circuit, wherein the method comprises the following steps:
adjusting by the processor load an average clock frequency of the frequency/clock generation circuit;
providing current to the processor load in response to the adjusted clock frequency;
determining by the processor load, whether the current provided is a final operating current; and
repeating the steps of adjusting, providing and determining until the current level reaches the final operating current.
14. The method of controlling a current supplied to the processor load according to claim 13 , wherein the processor load is one or more of: a micro-controller unit, a digital signal processor, an application specific integrated circuit, and other embedded controller.
15. The method of controlling a current supplied to the processor load according to claim 14 further characterised by an intermediate step of waiting, by the electronic device, for the supplied current to settle before determining whether the current provided is a final operating current.
16. An electronic device comprising:
a voltage regulator operably coupled to a processor load to supply a current to the processor load; and
a frequency/clock generation circuit operably coupled to the processor load that comprises one or more of the group consisting of:
a micro-controller unit; a digital signal processor; an application specific integrated circuit; and an embedded controller,
wherein the frequency/clock generation circuit is arranged to adjust a frequency of operation of the electronic device using a hardware clock slewing approach;
wherein the micro-controller unit is configured to:
determine whether the frequency of operation supplied to the micro-controller unit is a final operating frequency to operate the micro-controller unit, wherein the currrent provided to the processor load is proportional to the frequency of operation; and
cause the frequency/clock generation circuit to repeat the adjustment of the frequency of operation until the frequency of operation supplied to the micro-controller unit has reached the final operating frequency.
17. The electronic device of claim 16 wherein the frequency/clock generation circuit comprises a current controlled oscillator arranged to limit a rate of change of a clock slew rate.
18. The electronic device of claim 16 wherein the frequency/clock generation circuit comprises a voltage controlled oscillator operably coupled to a filter delay function, wherein the filter delay function is arranged to act upon the voltage controlled oscillator as a slew rate limiter.
19. The electronic device of claim 18 wherein the filter delay function is a digital counter for digitally controlling the voltage controlled oscillator or a current controlled oscillator.