Method for managing under-run and a device having under-run management capabilities
View Patent ↗A device having under-run management capabilities and to a method for managing under-runs. The method includes providing, to a memory unit, channel information from multiple channels; allocating time slots for communication channel transmissions; the method is characterized by including: sending, during a time slot allocated for a transmission of channel information from an enabled communication channel, to the shift register channel information of an enabled communication channel, serially outputting the received channel information from the shift register towards a communication line while serially replacing the outputted channel information by a predefined content such that the shift register stores a communication channel disable code when an under-run occurs; defining a communication channel as a disabled communication channel once the under-run occurs; and transmitting, during a time slot allocated to a disabled communication channel, idle signals to the communication line.
1. A device, comprising:
a memory unit;
a shift register coupled to the memory unit;
a memory unit controller coupled to the memory unit, and a communication line interface, whereas the memory unit is adapted to store channel information from multiple channels, and whereas the memory unit controller is adapted to control a provision of the channel information from the memory unit to the shift register; and
shift register logic adapted to replace the channel information outputted by the shift register by a predefined content when the shift register stores a communication channel disable code an under-run is detected;
whereas a communication channel that experienced the under-run is defined as a disabled communication channel, and whereas the channel information is characterized by a stop bit and whereas the communication channel disable code lacks the stop bit;
whereas the shift register logic is further adapted to transmit, via the communication line interface, idle signals during the at least one later time slot allocated to the disabled communication channel; and
whereas the device is adapted to transmit the channel information from enabled communication channels.
2. The device according to claim 1 whereas the memory unit controller is further adapted to control a provision of the communication channel disable code to a predefined memory entry allocated to the disabled communication channel.
3. The device according to claim 2 whereas the device comprises:
a processor, adapted to access the predefined memory entry in order to determine whether to continue the provision of the channel information of the communication channel.
4. The device according to claim 1 , whereas the device comprises:
a processor, that provides the channel information to the enabled communication channels.
5. The device according to claim 1 , whereas the device comprises:
a processor, coupled to the memory unit, whereas the processor is adapted to overwrite the communication channel disable code.
6. The device according to claim 1 , whereas the device comprises:
a processor that is adapted to enable the disabled communication channel by sending a communication channel enable command.
7. The device according to claim 1 , whereas the shift register logic is adapted to pad the content of the shift registers with digits that have the same value and whereas the communication channel disable code consists of digits that have that value.
8. The device according to claim 1 , whereas the shift register logic comprises:
an under-run detector and an idle signal generator that are coupled to a multiplexer, whereas the multiplexer is adapted to select between a serial output of the shift register and an output of the idle signal generator.
9. The device according to claim 1 , whereas the shift register logic is adapted to selectively insert the stop bit such as to allow a reception of the channel information from the memory unit.
10. A method, comprising:
providing, to a memory unit, channel information from multiple channels;
allocating time slots for communication channel transmissions;
sending, during a time slot allocated for a transmission of the channel information from an enabled communication channel, to the shift register channel information of the enabled communication channel, serially outputting the received channel information from the shift register towards a communication line while serially replacing the outputted channel information by a predefined content and the shift register stores a communication channel disable code when an under-run occurs;
defining a communication channel as a disabled communication channel once the under-run occurs; and
transmitting, during a time slot allocated to the disabled communication channel, idle signals to the communication line.
11. The method according to claim 10 , further comprising:
determining to enable the disabled communication channel.
12. The method according to claim 11 wherein the defining comprises:
storing the communication channel disable code at predefined memory entry allocated to the disabled communication channel.
13. The method according to claim 12 further comprising:
accessing the predefined memory entry and determining whether to provide the channel information from the associated communication channel.
14. The method according to claim 11 , further comprising:
determining whether to provide new channel information to the memory unit in response to an occurrence of the under-run.
15. The method according to claim 11 wherein the determining comprises:
overwriting the communication channel disable code.
16. The method according to claim 11 , wherein the channel information is characterized by the stop bit and wherein the communication channel disable code lacks the stop bit.
17. The method according to claim 11 , wherein the replacing comprises:
padding the content of the shift registers with digits that have the same value and wherein the communication channel disable code consists of digits that have that value.
18. The method according to claim 11 , wherein the transmitting comprises: selecting to provide outputs signals from an idle signal generator to a communication line interface and wherein the sending comprises selecting to provide signals from an output of the shift register.
19. The method according to claim 11 , wherein the stage of sending comprises: selectively inserting the stop bit such as to allow a reception of the channel information from the memory unit.
20. A device comprising:
a memory unit;
a shift register coupled to the memory unit;
a communication line for transmitting multiple communication channels;
a memory unit controller coupled to the memory unit, and the communication line, wherein the memory unit is adapted to store channel information from the multiple communication channels, and the memory unit controller is adapted to control a provision of the channel information from the memory unit to the shift register; and
shift register logic adapted to replace the channel information outputted by the shift register by a predefined content, and an under-run is detected when the shift register stores a communication channel disable code for a communication channel of the multiple communication channels;
wherein the communication channel of the multiple communication channels on the communication line that experienced the under-run is defined as a disabled communication channel;
wherein the shift register logic is further adapted to transmit, via the communication line interface, idle signals during the at least one later time slot allocated to the disabled communication channel, and wherein the device is adapted to transmit channel information from enabled communication channels.