Bumpless flip-chip assembly with a complaint interposer contractor
Consistent with an example embodiment, an integrated circuit device (IC) is assembled on a package substrate and encapsulated in a molding compound. There is a semiconductor die having a circuit pattern with contact pads. A package substrate having bump pad landings corresponding to the contact pads of the circuit pattern, has an interposer layer sandwiched between them. The interposer layer includes randomly distributed mutually isolated conductive columns of spherical particles embedded in an elastomeric material, wherein the interposer layer is subjected to a compressive force from pressure exerted upon an underside surface of the semiconductor die. The compressive force deforms the interposer layer causing the conductive columns of spherical particles to electrically connect the contact pads of the circuit pattern with the corresponding bump pad landings of the package substrate. The compressive force may be obtained from forces generated by thermal expansion properties of the molding compound and package substrate, metal clips or combinations, thereof.
1. An integrated circuit device (IC) assembled on a package substrate and encapsulated in a molding compound, the IC device comprising:
a semiconductor die having topside surface and an underside surface, the topside surface having a circuit pattern, the circuit pattern including contact pads in a predetermined arrangement;
a package substrate with a length and width, the package substrate having bump pad landings, the pad landings in an arrangement corresponding to the predetermined arrangement of the contact pads of the circuit pattern, the bump pad landings having connection traces coupling the pad landings to external contact regions in the package substrate; and
an interposer layer sandwiched between the semiconductor die and the package substrate, the interposer layer including randomly distributed mutually isolated conductive columns of spherical particles embedded in an elastomeric material,
wherein the interposer layer is subjected to a compressive force from pressure exerted upon the underside surface of the semiconductor die, the compressive force deforming the interposer layer causing the conductive columns of spherical particles to electrically connect the contact pads of the circuit pattern with the corresponding bump pad landings of the package substrate;
wherein the compressive force is obtained from a metal clip in contact with the underside surface of the semiconductor die, and
the metal clip having a length spanning the length and width of the package substrate and
having a height less than the combined thickness of the semiconductor die, the interposer fabric, and the package substrate, such that when the metal clip is engaged with the package substrate, the metal clip provides the compressive force.
2. The IC device as recited in claim 1 , further including a solder mask layer,
the solder mask layer having openings corresponding to the arrangement of bump pad landings on the substrate.
3. The IC device as recited in claim 1 , wherein the compressive force is obtained from a pre-stress metal clip in contact with underside surface of the semiconductor die,
the metal clip having a horizontal member and vertical members, the horizontal member substantially covering the underside surface of the semiconductor die, the vertical members anchored with retention heads in through holes defined in the package substrate, the retention heads maintaining the compressive force.
4. The IC device as recited in claim 3 , wherein the metal clip has at least two vertical members.
5. The IC device as recited in claim 4 , wherein the metal clip has four vertical members.
6. An integrated circuit device (IC) assembled on a package substrate, the IC device comprising:
a semiconductor die having topside surface and an underside surface, the topside surface having a circuit pattern, the circuit pattern including contact pads in a predetermined arrangement;
a package substrate having length and width, the package substrate having bump pad landings, the pad landings in an arrangement corresponding to the predetermined arrangement of the contact pads of the circuit pattern, the bump pad landings having connection traces coupling the pad landings to external contact regions in the package substrate; and
an interposer layer sandwiched between the semiconductor die and the package substrate, the interposer layer including randomly distributed mutually isolated conductive columns of spherical particles embedded in an elastomeric material,
wherein the interposer layer is subjected to a compressive force from a metal clip exerting pressure upon the underside surface of the semiconductor die, the compressive force deforming the interposer layer causing the conductive columns of spherical particles to electrically connect the contact pads of the circuit pattern with the corresponding bump pad landings of the package substrate; and
a passivating envelope of molding compound encapsulating the semiconductor die and interposer fabric.
7. The IC device as recited in claim 6 , the metal clip is selected from the following,
an external metal clip having length and width comparable to the length and width of the package substrate, a height slightly less than the combined thickness of the passivating envelope, the semiconductor die, the interposer fabric, and the package substrate, such that when the metal clip is engaged with the package substrate, the metal clip provides the compressive force, the metal clip mounted external to the passivating envelope;
an internal metal clip in contact with underside surface of the semiconductor die, the metal clip having a horizontal member and two or more vertical members, the horizontal member substantially covering the underside surface of the semiconductor die, the vertical members anchored with retention heads in through-holes defined in the package substrate, the retention heads maintaining the compressive force, the internal metal clip encapsulated within the passivating envelope along with the semiconductor die and interposer fabric on the package substrate.
8. A method for packaging an IC device having a circuit pattern including I/O contact pads in a flip-chip orientation on a package substrate, the package substrate having pad landings corresponding to the I/O contact pads of the circuit pattern, the method comprising:
a) selecting the package substrate suitable for an I/O pad layout of the IC device;
b) applying an interposer fabric on the package substrate, the interposer fabric having randomly distributed mutually isolated conductive columns of spherical particles embedded in an elastomeric material;
c) placing the IC device in the flip-chip orientation upon the interposer fabric;
d) applying a compressive force on the IC device, the compressive force deforming the interposer layer causing the conductive columns of spherical particles to electrically connect the contact pads of the circuit pattern with the corresponding bump pad landings of the package substrate;
e) maintaining the compressive force on the IC device; and
f) encapsulating the IC device in a passivating envelope; and
wherein maintaining the compressive force on the IC device further includes, using a mechanical clamp.
9. The method as recited in claim 8 , further comprising,
d1) performing an electrical test and making a determination of whether the device passes or fails;
if fail, obtain another IC device, and perform steps c) and d),
if pass, go to step e) followed by step f).