Granted Patent B2

US 8,050,371 · App. 12/098,453 · Granted Nov 1, 2011

Abstract

Claims (27)

1. A method for compensating for the effect of phase drift in a data sampling clock during data transfer between sub-systems of an electronic device, the sub-systems of the electronic device transferring the data frame by frame, each frame comprising a plurality of data windows, each of the plurality of data windows comprising one or more data bits, the method comprising:

sampling each of the one or more data bits of a data window at one or more early instances, a prompt instance and one or more late instances, wherein the prompt instance is a bit sampling instance, and wherein each of the one or more early instances occurs prior to the prompt instance and each of the one or more late instances occurs after the prompt instance;

calculating a phase error value for the sampled data window based on the data sampled for each of the one or more data bits at the one or more early instances, the prompt instance and the one or more late instances; and

compensating for the effect of phase drift in the data sampling clock based on one of the calculated phase error value or a pre-determined fixed value,

wherein the step of calculating the phase error value for the sampled data window comprises:

calculating one or more early phase error values for each of the one or more data bits, wherein the one or more early phase error values is a difference between the data sampled at the one or more early instances and the data sampled at the prompt instance;

calculating one or more late phase error values for each of the one or more data bits, wherein the one or more late phase error values is a difference between the data sampled at the one or more late instances and the data sampled at the prompt instance; and

calculating the phase error value for the sampled data window based on the one or more early phase error values and the one or more late phase error values, and

wherein the step of calculating the phase error value for the sampled data window comprises:

adding absolute values of the one or more early phase error values over the sampled data window to obtain an accumulated early phase error value;

adding absolute values of the one or more late phase error values over the sampled window to obtain an accumulated late phase error value; and

calculating the phase error value for the sampled data window based on at least one of the accumulated early phase error value and the accumulated late phase error value.

2. The method for compensating for the effect of phase drift in a data sampling clock of claim 1 , wherein the step of calculating the phase error value for the sampled data window comprises:

comparing the accumulated early phase error value with the accumulated late phase error value to obtain a data window phase error value; and

comparing the data window phase error value with a pre-defined phase error value to obtain the phase error value.

3. The method for compensating for the effect of phase drift in a data sampling clock of claim 1 , wherein the step of compensating for the effect of phase drift in the data sampling clock comprises shifting the position of the prompt instance based on the calculated phase error value.

4. A system for compensating for the effect of phase drift in a data sampling clock during data transfer between sub-systems of an electronic device, the sub-systems of the electronic device transferring the data frame by frame, each frame comprising a plurality of data windows, each of the plurality of data windows comprising one or more data bits, the system comprising:

a multiphase detector that samples each of the one or more data bits of a data window at one or more early instances, a prompt instance and one or more late instances, wherein the prompt instance is a bit sampling instance, and wherein each of the one or more early instances occurs prior to the prompt instance and each of the one or more late instances occurs after the prompt instance; and

a processor that calculates a phase error value for the sampled data window based on the data sampled for each of the one or more data bits at the one or more early instances, the prompt instance and the one or more late instances and compensates the effect of phase drift in the data sampling clock based on the phase error value,

wherein the processor comprises:

a comparator that compares the data sampled at the one or more early instances and the data sampled at the one or more late instances with the data sampled at the prompt instance to obtain one or more early phase error values and one or more late phase errors values respectively for each of the one or more data bits;

an accumulator that accumulates absolute values of the one or more early phase error values over the sampled data window to obtain an accumulated early phase error value, and adds absolute values of the one or more late phase error values over the sampled data window to obtain an accumulated late phase error value; and

a phase error value calculator that calculates the phase error value based on at least one of the accumulated early phase error value, the accumulated late phase error value and a pre-defined phase error value.

5. The system for compensating for the effect of phase drift in the data sampling clock of claim 4 , wherein the multiphase detector comprises:

an early detector that samples data at the one or more early instances;

a prompt detector that samples data at the prompt instance; and

a late detector that samples data at the one or more late instances.

Assignments (31)