IP Library Granted Patent US 8,027,375
Granted Patent B2
US 8,027,375 · App. 12/103,201 · Granted Sep 27, 2011

Shared filter design for pilot symbol averaging in rake fingers in WCDMA systems

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Quick Facts
Patent No.
US 8,027,375
App. No.
12/103,201
Granted
Sep 27, 2011
Kind
B2
Abstract

A rake receiver having a shared moving average filter that is operable in a multiplexed manner to receive and filter outputs from a plurality of pilot signal correlators.

Claims (18)

1. A rake receiver comprising a shared moving average filter that is operable in a multiplexed manner to receive and filter outputs from a plurality of pilot signal correlators, wherein at least one buffer is provided to store a plurality of output values from a pilot signal correlator prior to providing the signals to the filter.

2. A rake receiver as claimed in claim 1 , wherein the rake receiver is further configured for transmit mode diversity, and the shared moving average filter is further arranged to form averages of time multiplexed pilots.

3. A rake receiver as claimed in claim 1 , wherein a multiplexer is provided for selecting pilot data to be supplied from the at least one buffer to the filter.

4. A rake receiver as claimed in claim 1 , wherein the moving average filter and rake receiver are operable as a path searcher.

5. A rake receiver as claimed in claim 1 , wherein the filter comprises an accumulator and a store, and the store comprises a plurality of memory addresses, each allocated to a specific pilot signal.

6. A rake receiver as claimed in claim 5 , wherein each specific pilot signal is allocated a block of memory addresses.

7. A rake receiver as claimed in claim 6 , wherein the block of memory is organized as a circular buffer.

8. A rake receiver as claimed in claim 5 , in which when the receiver is used for path searcher CPICH filtering the memory locations within a buffer are used as accumulators.

9. A rake receiver as claimed in claim 1 , where the filter is associated with a filter processor which performs the operations to add an accumulated value to an incoming value.

10. A rake receiver as claimed in claim 9 , in which the filter processor performs space/time transmit diversity decoding.

11. A rake receiver as claimed in claim 10 , in which after space time transmit diversity decoding symbols for a first antenna are stored back into locations used for even chip symbols and symbols for a second antenna are stored back into locations used for odd chip symbols.

12. A rake receiver comprising a shared moving average filter that is operable in a multiplexed manner to receive and filter outputs from a plurality of pilot signal correlators, wherein the rake receiver is further configured for transmit mode diversity, and the shared moving average filter is further arranged to form averages of time multiplexed pilots.

13. A rake receiver comprising a shared moving average filter that is operable in a multiplexed manner to receive and filter outputs from a plurality of pilot signal correlators, wherein the filter comprises an accumulator and a store, and the store comprises a plurality of memory addresses, each allocated to a specific pilot signal;

and each specific pilot signal is allocated a block of memory addresses.

14. A rake receiver as claimed in claim 13 , wherein the block of memory is organized as a circular buffer.

15. A rake receiver comprising a shared moving average filter that is operable in a multiplexed manner to receive and filter outputs from a plurality of pilot signal correlators, wherein the filter is associated with a filter processor which performs the operations to add an accumulated value to an incoming value, the filter processor performs space/time transmit diversity decoding, and after space time transmit diversity decoding symbols for a first antenna are stored back into locations used for even chip symbols and symbols for a second antenna are stored back into locations used for odd chip symbols.

16. A rake receiver comprising a shared moving average filter that is operable in a multiplexed manner to receive and filter outputs from a plurality of pilot signal correlators, wherein the filter comprises an accumulator and a store, and the store comprises a plurality of memory addresses, each allocated to a specific pilot signal;

and when the receiver is used for path searcher CPICH filtering the memory locations within a buffer are used as accumulators.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2024
From: MEDIATEK INC.
To: INTERLINK SILICON SOLUTIONS INC.
Reel/Frame 069604/0902 →