IP Library Granted Patent US 7,683,600
Granted Patent B2
US 7,683,600 · App. 12/104,063 · Granted Mar 23, 2010

Output circuit

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Quick Facts
Patent No.
US 7,683,600
App. No.
12/104,063
Granted
Mar 23, 2010
Kind
B2
Abstract

An output circuit in accordance with one embodiment of the present invention includes: an input terminal for receiving an input signal; an output transistor connected between a first power supply and an output terminal; a current control circuit connected to the input terminal and the output transistor for controlling current outflow and inflow for the gate of the output transistor based on the input signal; a voltage generating circuit connected to the first power supply; and a switch circuit coupled between the gate of the output transistor and the voltage generating circuit, the switch circuit having alternatively an on state and an off state thereof in response to the input signal; wherein the switch circuit becomes the off state when the potential difference between the gate of the output transistor and the first power supply becomes equal to or below a predetermine value regardless of the voltage level of the input signal.

Claims (43)

1. An output circuit comprising:

an input terminal receiving an input signal;

an output transistor connected between a first power supply and an output terminal;

a current control circuit connected to the input terminal and the output transistor for controlling current outflow and inflow for the gate of the output transistor based on the input signal;

a voltage generating circuit connected to the first power supply; and

a switch circuit coupled between the gate of the output transistor and the voltage generating circuit, the switch circuit having alternatively an on state and an off state thereof in response to the input signal;

wherein the switch circuit becomes the off state when the potential difference between the gate of the output transistor and the first power supply becomes equal to or below a predetermine value regardless of the voltage level of the input signal.

2. The output circuit of claim 1 wherein the switch circuit comprises a source connected to the voltage generating circuit and a drain connected to the gate of the output transistor, and the voltage generating circuit establishes the voltage difference between the source and the first power supply.

3. The output circuit of claim 1 wherein the voltage generating circuit establishes the voltage difference between the gate of the output transistor and the first power supply by a plurality of serially connected diodes, at which voltage difference the switch circuit becomes the off state.

4. The output circuit of claim 3 wherein the output transistor is composed of a NMOS transistor, each of the diodes is composed of a diode-connected NMOS transistor, and the anode of the diodes is connected on the side of the gate of the output transistor and the cathode of the diodes is connected on the side of the first power supply.

5. The output circuit of claim 3 wherein the output transistor is composed of a PMOS transistor, each of the diodes is composed of a diode-connected PMOS transistor, and the cathode of the diodes is connected on the side of the gate of the output transistor and the anode of the diodes is connected on the side of the first power supply.

6. The output circuit of claim 1 wherein the voltage difference established by the voltage generating circuit is determined by the threshold voltage of the output transistor and the transconductance of the output transistor.

7. The output circuit of claim 1 wherein the current control circuit controls such that the current value at the outflow stage and the current value at the inflow stage are substantially the same.

8. The output circuit of claim 1 further comprising a capacitor connected between the gate of the output transistor and the first power supply or the second power supply.

9. The output circuit of claim 1 wherein:

the current control circuit comprises:

a first current source and a first current control switch connected in series between the first power supply and the gate of the output transistor; and

a second current source and a second current control switch connected in series between the second power supply and the gate of the output transistor; and

the on state and the off state of the first and second current control switches are controlled based on the input signal.

10. The output circuit of claim 1 wherein the current control circuit comprises:

a first current source for establishing current value on the inflow side of the current control circuit;

a first current mirror for drawing in current for the gate of the output transistor based on the current outputted from the first current source;

a second current source for establishing current value on the outflow side of the current control circuit;

a second current mirror for pouring out current for the gate of the output transistor based on the current outputted from the second current source;

a first current control switch coupled between the gate of the transistor constituting the first current mirror and the first power supply, the first current control switch having alternatively an on state and an off state thereof in response to the input signal; and

a second current control switch coupled between the gate of the transistor constituting the second current mirror and the second power supply, the second current control switch having alternatively an on state and an off state thereof in response to the input signal.

11. The output circuit of claim 1 wherein the current control circuit comprises:

a first current source for establishing current value on the inflow side of the current control circuit;

a first current mirror for drawing in current for the gate of the output transistor based on the current outputted from the first current source;

a second current source for establishing current value on the outflow side of the current control circuit;

a second current mirror for pouring out current for the gate of the output transistor based on the current outputted from the second current source; and

a first current control switch coupled between the gate of the transistor constituting the first current mirror and the first power supply, the first current control switch having alternatively an on state and an off state thereof in response to the input signal.

12. The output circuit of claim 1 wherein the current control circuit comprises:

a first current source for establishing current value on the inflow side of the current control circuit;

a first current mirror for drawing in current for the gate of the output transistor based on the current outputted from the first current source;

a second current source for establishing current value on the outflow side of the current control circuit;

a second current mirror for pouring out current for the gate of the output transistor based on the current outputted from the second current source; and

a second current control switch coupled between the gate of the transistor constituting the second current mirror and the second power supply, the second current control switch having alternatively an on state and an off state thereof in response to the input signal.

13. The output circuit of claim 1 wherein:

the current control circuit comprises:

a first transistor connected between the gate of the output transistor and the first power supply, the conductivity state of the first transistor being controlled based on the input signal; and

a second transistor connected between the gate of the output transistor and the second power supply, the conductivity state of the second transistor being controlled based on the input signal; and

the first and second transistors controls the current value drawn in or poured out for the gate of the output transistor based on the value of the on-resistance.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0696 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2008
From: KANAMARU, JIRO; AKIOKA, TOSHIAKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 020812/0963 →