IP Library Granted Patent US 8,030,207
Granted Patent B2
US 8,030,207 · App. 12/110,662 · Granted Oct 4, 2011

Method of manufacturing a semiconductor device and semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,030,207
App. No.
12/110,662
Granted
Oct 4, 2011
Kind
B2
Abstract

A method of manufacturing a semiconductor device has forming, in a dielectric film, a first opening and a second opening located in the first opening, forming a first metal film containing a first metal over a whole surface, etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the whole surface, and burying a conductive material in the second opening and the first opening.

Claims (27)

1. A method of manufacturing a semiconductor device, comprising:

forming a first wiring layer over a semiconductor substrate;

forming a dielectric film over the first wiring layer;

forming, in the dielectric film, a first opening and a second opening within the first opening which reaches the first wiring layer;

forming a first metal film containing a first metal over a surface of the first opening, the second opening, and the dielectric film;

etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the surface of the first opening, the second opening, and the dielectric film;

burying a conductive material in the second opening and the first opening; and

in said forming the second metal film, a first Vd/Ve at the bottom of the second opening is smaller than a second Vd/Ve at the surface of the dielectric film, where Vd is a deposition rate and Ve is an etching rate.

2. The method according to claim 1 , further comprising:

after forming the first metal film, a third metal film containing the second metal is formed over the surface of the first opening, the second opening, and the dielectric film before forming the second metal film.

3. The method according to claim 1 , wherein

in forming the second metal film, a fourth metal film containing the first metal and the second metal is formed over a sidewall of the second opening.

4. The method according to claim 1 , wherein

any one of argon, helium, and xenon is used as a sputtering gas for formation of the second metal film.

5. The method according to claim 1 , wherein

the first metal includes any one of titanium, zirconium, and manganese, or alloys thereof.

6. The method according to claim 1 , wherein

the second metal includes any one of tantalum and tungsten, or alloys thereof.

7. The method according to claim 1 , wherein

the conductive material includes copper.

8. The method according to claim 7 , wherein burying the conductive material comprising:

forming a seed copper film over the surface of the first opening, the second opening, and the dielectric film; and

depositing a copper wiring film over the seed copper film using an electroplating method.

9. The method according to claim 8 , wherein

the seed copper film is formed by a sputtering process.

10. The method according to claim 1 further comprising:

after forming the second metal film, a fifth metal film containing the second metal is formed over the surface of the first opening, the second opening, and the dielectric film by a sputtering process before burying conductive material.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2008
From: AKIYAMA, SHINICHI; KAWAMURA, KAZUO; SAKAI, HISAYA; WATATANI, HIROFUMI; OKUBO, KAZUYA
To: FUJITSU LIMITED
Reel/Frame 021287/0168 →