Detection of a disturbance in the state of an electronic circuit flip-flop

1. A circuit for detecting a disturbance of the state of at least one first flip-flop from a group of first flip-flops, comprising:

a first element of logic combination of the respective outputs of the flip-flops in the group, independently from the function given to the flip-flops of the group;

two second flip-flops for receiving, on their respective trigger inputs, a signal resulting from the logic combination and an inverse of the logic combination and, on their respective data inputs, a same state; and

a second element of logic combination of the respective outputs of the two second flip-flops.

2. The circuit of claim 1 , wherein the first combination element performs an XOR-type combination.

3. The circuit of claim 1 , wherein the second combination element performs an OR-type combination.

4. The circuit of claim 1 , wherein the initialization signal is a periodic pulse train of same period as the trigger signal of the first flip-flops.

5. An electronic circuit comprising the detection circuit of claim 1 .

6. A method for detecting a disturbance of a state of at least one first flip-flop from a group of several first flip-flops of an electronic circuit, wherein:

the respective outputs of the first flip-flops in the group are, independently from their functional purpose, combined to provide a signal and its inverse, triggering two second flip-flops having data inputs forced to a same state, the respective outputs of the second flip-flops being combined to provide the result of the detection; and

a pulse signal comprising a pulse at least for each triggering edge of one of the first flip-flops in the group initializes the second flip-flops.

7. The method of claim 6 , wherein the combination of the outputs of the first flip-flops is of XOR type.

8. The method of claim 6 , wherein the initialization signal of the second flip-flops is a periodic pulse train.

9. The method of claim 8 , wherein the initialization signal is of a same period as a trigger signal common to the first flip-flops.

10. The method of claim 6 , wherein the duration of the pulses of the initialization signal of the second flip-flops is at least equal to the settling time of the first flip-flops plus the combination time of their output signals.

11. A method for detecting a disturbance of a state of at least one flip-flop from a first set of flip-flops of an electronic circuit, comprising:

combining outputs from flip-flops of the first set, independently from functional purposes of first flip-flops of the first set, to provide a signal and an inverse of the signal;

triggering a first flip-flop of a second set of flip-flops with the signal;

triggering a second flip-flops of the second set of flip-flops with the inverse of the signal, the flip-flops of the second set having a common input state; and

combining outputs of the second set to detect the disturbance.

12. The method of claim 11 , wherein combining outputs of the first set of flip-flops includes combining outputs of the first set of flip-flops with an XOR type function.

13. The method of claim 11 , further comprising:

initializing the flip-flops of the second set with a pulse signal that includes a pulse at least for each triggering edge of a flip-flop in the first set.

14. The method of claim 13 , wherein initializing the flip-flops of the second set includes initializing the flip-flops of the second set with a periodic pulse train.

15. The method of claim 14 , wherein the pulse train is of a same period as a trigger signal common to the plurality of first flip-flops.

16. The method of claim 13 , wherein a duration of the pulses of the initialization signal of the flip-flops of the second set is at least equal to the settling time of the flip-flops of the first set plus a combination time of their output signals.