Semiconductor device and fabrication process thereof
View Patent ↗A semiconductor device includes a semiconductor substrate formed with an active element, an oxidation resistant film formed over the semiconductor substrate so as to cover the active element, a ferroelectric capacitor formed over the oxidation resistance film, the ferroelectric capacitor having a construction of consecutively stacking a lower electrode, a ferroelectric film and an upper electrode, and an interlayer insulation film formed over the oxidation resistance film so as to cover the ferroelectric capacitor, wherein there are formed, in the interlayer insulation film, a first via-plug in a first contact hole exposing the first electrode and a second via-plug in a second contact hole exposing the lower electrode, and wherein there is formed another conductive plug in the interlayer insulation film in an opening exposing the oxidation resistant film.
1. A method for fabricating a semiconductor device, said semiconductor device comprising a semiconductor substrate formed with an active element, an oxidation resistant film formed over said semiconductor substrate so as to cover said active element, a first interlayer insulation film formed over said oxidation resistant film, a ferroelectric capacitor formed over said first interlayer insulation film and having a construction of consecutively stacking a lower electrode, a ferroelectric film and an upper electrode; and a second interlayer insulation film formed so as to cover said ferroelectric capacitor, said method comprising the steps of:
forming first and second contact holes in said second interlayer insulation film so as to expose said upper electrode and said lower electrode, respectively;
forming an opening in said second interlayer insulation film so as to expose said oxidation resistant film such that a hydrogen barrier film covering said ferroelectric capacitor in conformity with a shape of said ferroelectric capacitor under said second interlayer insulation film is exposed at a sidewall of said opening in a state in which said oxidation resistant film is exposed at a bottom of said opening and such that said first interlayer insulation film is exposed at said sidewall of said opening in said state in which said oxidation resistant film is exposed at said bottom of said opening,
conducting a thermal annealing process in an oxidizing ambient in a state in which said first and second contact holes and said opening are formed in said second interlayer insulation film; and
exposing, after conducting the thermal annealing process, a lower conductive plug underneath said oxidation resistant film by removing said oxidation resistant film exposed at said opening; and filling said opening with a conductive plug.
2. The method as claimed in claim 1 , wherein said opening is formed after said step of forming said first and second contact holes.
3. The method as claimed in claim 2 , wherein said opening is formed by using a hard mask pattern formed on said second interlayer insulation film as a mask.
4. The method as claimed in claim 1 , wherein said step of forming said first and second contact holes and said step of forming said opening are conducted simultaneously.
5. The method as claimed in claim 1 , wherein a said hydrogen barrier film comprises an Al 2 O 3 film or AlN film.
6. The method as claimed in claim 1 , further comprising a step of plasma-nitriding sidewall surfaces of said first contact hole, said second contact hole and said opening after said thermal annealing process.
7. The method as claimed in claim 1 , wherein said hydrogen barrier film exposed in said opening has a sidewall surface coincident to a sidewall surface of said opening.