IP Library Granted Patent US 7,672,186
Granted Patent B2
US 7,672,186 · App. 12/129,168 · Granted Mar 2, 2010

Antifuse replacement determination circuit and method of semiconductor memory device

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Quick Facts
Patent No.
US 7,672,186
App. No.
12/129,168
Granted
Mar 2, 2010
Kind
B2
Abstract

An antifuse replacement determination circuit of a semiconductor memory device, in which the address of a bad memory cell is stored by destroying the insulation of an antifuse element, includes a charging circuit for charging a node of the antifuse element to have a predetermined voltage, and making the charge at the node self-discharge via the antifuse element after the charging of the node is completed; a comparison and determination circuit for comparing the voltage at the node of the antifuse element with a plurality of reference voltages when a predetermined time has elapsed after the completion of the charging of the node; and a determination part for determining, based on a determination result with respect to the comparison using the plurality of reference voltages in the comparison and determination circuit, whether or not replacement of the bad memory cell has been performed normally by using the antifuse element.

Claims (68)

1. An antifuse replacement determination circuit of a semiconductor memory device, wherein:

the semiconductor memory device has a memory cell array in which data is stored in each memory cell, and the address of a bad memory cell is stored as a bad address by destroying the insulation of an antifuse element so as to replace the bad memory cell with another memory element;

it is determined by the antifuse replacement determination circuit whether or not the replacement of the bad memory cell has been performed normally by using the antifuse element, and

the antifuse replacement determination circuit comprises:

an antifuse element charging circuit for charging a node of the antifuse element to have a predetermined voltage, and making the charge at the node self-discharge via the antifuse element after the charging of the node is completed;

a comparison and determination circuit for comparing the voltage at the node of the antifuse element with a plurality of reference voltages when a predetermined time has elapsed after the completion of the charging of the node; and

an AF destruction result determination part for determining, based on a determination result with respect to the comparison using the plurality of reference voltages in the comparison and determination circuit, whether or not the replacement of the bad memory cell has been performed normally by using the antifuse element.

2. The antifuse replacement determination circuit in accordance with claim 1 , wherein:

the comparison and determination circuit includes three comparison and determination circuits; and

the antifuse replacement determination circuit has:

a first comparison and determination circuit for comparing the voltage at the node of the antifuse element with a first reference voltage VREF 1 ;

a first latch circuit for storing a determination result with respect to the comparison of the first comparison and determination circuit;

a second comparison and determination circuit for comparing the voltage at the node of the antifuse element with a second reference voltage VREF 2 , wherein VREF 1 >VREF 2 ;

a second latch circuit for storing a determination result with respect to the comparison of the second comparison and determination circuit;

a third comparison and determination circuit for comparing the voltage at the node of the antifuse element with a third reference voltage VREF 0 , wherein VREF 1 >VREF 0 >VREF 2 ;

a third latch circuit for storing a determination result with respect to the comparison of the third comparison and determination circuit; and

a transfer-gate part for selecting one of the determination results stored in the latch circuits and transmitting the selected result to the AF destruction result determination part.

3. The antifuse replacement determination circuit in accordance with claim 2 , further comprising:

a first determination executing part for making the first comparison and determination circuit compare the voltage at the node of the antifuse element with the first reference voltage VREF 1 , and transmitting the determination result stored in the first latch circuit to the AF destruction result determination part via the transfer-gate part;

a second determination executing part for making the second comparison and determination circuit compare the voltage at the node of the antifuse element with the second reference voltage VREF 2 , and transmitting the determination result stored in the second latch circuit to the AF destruction result determination part via the transfer-gate part; and

a third determination executing part for making the third comparison and determination circuit compare the voltage at the node of the antifuse element with the third reference voltage VREF 0 , and transmitting the determination result stored in the third latch circuit to the AF destruction result determination part via the transfer-gate part.

4. The antifuse replacement determination circuit in accordance with claim 1 , wherein:

the comparison and determination circuit has a single comparison and determination circuit; and

the antifuse replacement determination circuit has:

a transfer-gate part for selecting one of a first reference voltage VREF 1 , a second reference voltage VREF 2 , and a third reference voltage VREF 0 for comparison with the voltage at the node of the antifuse element, and transmitting the selected reference voltage to the comparison and determination circuit, wherein VREF 1 >VRFF 0 >VREF 2 ;

a first determination executing part for making the transfer-gate part select the first reference voltage VREF 1 , and making the comparison and determination circuit compare the voltage at the node of the antifuse element with the first reference voltage VREF 1 ;

a second determination executing part for making the transfer-gate part select the second reference voltage VREF 2 , and making the comparison and determination circuit compare the voltage at the node of the antifuse element with the second reference voltage VREF 2 ;

a third determination executing part for making the transfer-gate part select the third reference voltage VREF 0 , and making tie comparison and determination circuit compare the voltage at the node of the antifuse element with the third reference voltage VREF 0 ; and

a single latch circuit for storing a determination result with respect to the comparison of the comparison and determination circuit.

5. The antifuse replacement determination circuit in accordance with claim 3 , wherein the AF destruction result determination part determines that:

the antifuse element is in a normal state when it is determined through the operation of the first determination executing part that the voltage at the node of the antifuse element is higher tan or equal to the first reference voltage VREF 1 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element has a failure when it is determined through the operation of the first determination executing part that the voltage at the node of the antifuse element is lower than the first reference voltage VREF 1 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element is in a normal state when it is determined through the operation of tie second determination executing part that the voltage at the node of the antifuse element is lower than the second reference voltage VREF 2 , and the antifuse element has an anticipated value which indicates destruction; and

the antifuse element has a failure when it is determined through the operation of the second determination executing part that the voltage at the node of the antifuse element is higher than or equal to the second reference voltage VREF 2 , and the antifuse element has an anticipated value which indicates destruction.

6. The antifuse replacement determination circuit in accordance with claim 4 , wherein the AF destruction result determination part determines that:

the antifuse element is in a normal state when it is determined through the operation of the first determination executing part that the voltage at the node of the antifuse element is higher than or equal to the first reference voltage VREF 1 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element has a failure when it is determined through the operation of the first determination executing part that the voltage at the node of the antifuse element is lower than the first reference voltage VREF 1 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element is in a normal state when it is determined through the operation of the second determination executing part that the voltage at the node of the antifuse element is lower than the second reference voltage VREF 2 , and the antifuse element has an anticipated value which indicates destruction; and

the antifuse element has a failure when it is determined through the operation of the second determination executing part that the voltage at the node of the antifuse element is higher than or equal to the second reference voltage VREF 2 , and the antifuse element has an anticipated value which indicates destruction.

7. The antifuse replacement determination circuit in accordance with claim 5 , wherein when the antifuse element has an anticipated value which indicates destruction, if it is determined through the operation of the first determination executing part that the voltage at the node of the antifuse element is lower than the first reference voltage VREF 1 , and it is also determined through the operation of the second determination executing part that the voltage at the node of the antifuse element is higher than or equal to the second reference voltage VREF 2 , then the AF destruction result determination part generates a signal for indicating a determination that the antifuse element should be destroyed again.

8. The antifuse replacement determination circuit in accordance with claim 6 , wherein when the antifuse element has an anticipated value which indicates destruction, if it is determined through the operation of the first determination executing part that the voltage at the node of the antifuse element is lower than the first reference voltage VREF 1 , and it is also determined through the operation of the second determination executing part that the voltage at the node of the antifuse element is higher than or equal to the second reference voltage VREF 2 , then the AF destruction result determination part generates a signal for indicating a determination that the antifuse element should be destroyed again.

9. The antifuse replacement determination circuit in accordance with claim 5 , wherein the AF destruction result determination part determines that:

the antifuse element is in a normal state when it is determined through the operation of the third determination executing part that the voltage at the node of the anise element is higher than or equal to the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element has a failure when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is lower than the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element is in a normal state when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is lower than the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates destruction; and

the antifuse element has a failure when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is higher than or equal to the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates destruction.

10. The antifuse replacement determination circuit in accordance with claim 6 , wherein the AF destruction result determination part determines that:

the antifuse element is in a normal state when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is higher than or equal to the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element has a failure when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is lower than the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates non-destruction;

the antifuse element is in a normal state when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is lower than the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates destruction; and

the antifuse element has a failure when it is determined through the operation of the third determination executing part that the voltage at the node of the antifuse element is higher tan or equal to the third reference voltage VREF 0 , and the antifuse element has an anticipated value which indicates destruction.

11. The antifuse replacement determination circuit in accordance with claim 2 , wherein:

the predetermined voltage applied to the node of the antifuse element is 1.4V;

the first reference voltage VREF 1 is 0.35V;

the second reference voltage VREF 2 is 0.95V; and

the third reference voltage VREF 0 is 1.1V.

12. The antifuse replacement determination circuit in accordance with claim 4 , wherein:

the predetermined voltage applied to the node of the antifuse element is 1.4V;

the first reference voltage VREF 1 is 0.35V;

the second reference voltage VREF 2 is 0.95V; and

the third reference voltage VREF 0 is 1.1V.

13. An antifuse replacement determination method used in a semiconductor memory device, wherein:

the semiconductor memory device has a memory cell array in which data is stored in each memory cell, and the address of a bad memory cell is stored as a bad address by destroying the insulation of an antifuse element so as to replace the bad memory cell with another memory element;

it is determined by the antifuse replacement determination method whether or not the replacement of the bad memory cell has been performed normally by using the antifuse element; and

the antifuse replacement determination method comprises:

an antifuse element charging step of charging a node of the antifuse element to have a predetermined voltage, and making the charge at the node self-discharge via the antifuse element after the charging of the node is completed;

a comparison and determination step of comparing the voltage at the node of the antifuse element with a plurality of reference voltages when a predetermined time has elapsed after the completion of the charging of the node; and

an AF destruction result determination step of determining, based on a determination result with respect to the comparison using the plurality of reference voltages in the comparison and determination step, whether or not the replacement of the bad memory cell has been performed normally by using the antifuse element.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0588 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
RE-RECORD TO CORRECT THE ASSIGNEE'S INFORMATION ON A DOCUMENT PREVIOUSLY RECORDED AT REEL 021614, FRAME 0403. (ASSIGNMENT OF ASSIGNOR'S INTEREST) Recorded Feb 3, 2009
From: OGISHIMA, MASAMICHI
To: ELPIDA MEMORY, INC.
Reel/Frame 022219/0354 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2008
From: OGISHIMA, MASAMICHI
To: ELPIDA MEMORY INC.
Reel/Frame 021614/0403 →