IP Library Granted Patent US 7,895,464
Granted Patent B2
US 7,895,464 · App. 12/131,329 · Granted Feb 22, 2011

Cache synchronization in a RAID subsystem using serial attached SCSI and/or serial ATA

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Quick Facts
Patent No.
US 7,895,464
App. No.
12/131,329
Granted
Feb 22, 2011
Kind
B2
Abstract

A RAID system includes a pair of RAID controllers adapted to operate in active-active mode, each controller including a cache memory and at least one SAS/SATA I/O chip connected to a plurality of hard disk drives. Each SAS/SATA I/O chip includes more SAS/SATA ports than required to carry data to the hard drives. The caches in the respective controllers are synchronized via the extra SAS/SATA ports in each controller.

Claims (12)

1. A RAID system comprising:

a plurality of hard disk drives;

a first RAID controller and a second RAID controller, each of said RAID controllers including a cache memory, and each of said RAID controllers electrically connected to said plurality of hard disk drives;

a first serial attached SCSI (SAS) or serial ATA (SATA) (SAS/SATA) input/output (I/O) circuit associated with said first RAID controller and a second SAS/SATA I/O circuit associated with said second RAID controller;

said first SAS/SATA I/O circuit directly electrically connected to said second SAS/SATA I/O circuit;

wherein said first SAS/SATA I/O circuit includes a first plurality of SAS/SATA ports and said second SAS/SATA I/O circuit includes a second plurality of SAS/SATA ports, and wherein each said SAS/SATA port in said first plurality of SAS/SATA ports is connected to one of said SAS/SATA ports in said second plurality of SAS/SATA ports;

wherein said first SAS/SATA I/O circuit includes a first SAS/SATA I/O chip having a first SAS/SATA I/O port and a second SAS/SATA I/O chip having a second SAS/SATA I/O port, and said second SAS/SATA I/O circuit includes a third SAS/SATA I/O chip having a third SAS/SATA I/O port and a fourth SAS/SATA I/O chip having a fourth SAS/SATA I/O port, and wherein said first SAS/SATA I/O port is connected to said third SAS/SATA I/O port and said second SAS/SATA I/O port is connected to said fourth SAS/SATA I/O port; and

wherein said plurality of disk drives includes a first plurality of hard disk drives and a second plurality of disk drives, each of said first SAS/SATA I/O chip and said third SAS/SATA I/O chip is connected to said first plurality of disk drives, and each of said second I/O chip and said fourth I/O chip is connected to said second plurality of hard disk drives.

2. A RAID controller as in claim 1 wherein each of said SAS/SATA I/O ports includes a SAS/SATA transceiver.

3. A RAID controller as in claim 1 and further including a RAID system backplane and wherein said first and third SAS/SATA I/O ports and said second and fourth SAS/SATA I/O ports are connected via said RAID system backplane.

4. A RAID controller as in claim 1 and further including a RAID system backplane and wherein said first SAS/SATA I/O circuit and said second SAS/SATA I/O circuit are connected to said RAID system backplane.

5. A RAID controller as in claim 1 wherein said first SAS/SATA I/O circuit includes a first SAS/SATA transceiver and said second SAS/SATA I/O circuit includes a second SAS/SATA transceiver, and said first SAS/SATA transceiver is electrically connected to said second SAS/SATA transceiver.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Feb 1, 2016
From: BANK OF AMERICA, N.A.
To: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
Reel/Frame 037675/0129 →
PATENT ASSIGNMENT Recorded Nov 1, 2013
From: ADPT CORPORATION
To: PMC-SIERRA, INC.
Reel/Frame 031532/0688 →
SECURITY INTEREST IN PATENTS Recorded Aug 6, 2013
From: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 030947/0710 →