Stress liner for stress engineering

1. A method of fabricating an IC comprising:

providing a substrate having first and second active regions defined thereon, the first active region comprises a first transistor of a first type and the second active region comprises a second transistor of a second type;

forming a continuous first stress liner on the substrate covering the first and second transistors, wherein the continuous first stress liner comprises a first stress;

forming a mask to protect a second portion of the continuous first stress liner in the second active region while leaving a first portion of the continuous first stress liner in the first active region exposed;

performing a first stress treatment, the first stress treatment is performed selectively on the first portion of the continuous first stress liner, the first treatment transforms the first stress in the first portion to a second stress while the mask protects the second portion of the continuous first stress liner in the second active region from the first stress treatment;

removing the mask over the second portion of the continuous first stress liner; and

after removing the mask, performing a second stress treatment, the second stress treatment is performed non-selectively on both the first and second portions of the continuous first stress liner, the second treatment transforms the second stress in the first portion of the continuous first stress liner to a third stress.

2. The method of claim 1 wherein the first type comprises n-type and the second type comprises p-type.

3. The method of claim 2 wherein:

the first stress comprises tensile stress; and

the third stress comprises compressive stress, wherein the second stress is between the first and third stresses.

4. The method of claim 1 wherein the first type comprises p-type and the second type comprises n-type.

5. The method of claim 4 wherein:

the first stress comprises compressive stress; and

the third stress comprises tensile stress, wherein the second stress is between the first and third stresses.

6. The method of claim 1 wherein:

the first stress comprises compressive stress and the third stress comprises tensile stress; or

the first stress comprises tensile stress and the third stress comprises compressive stress; and

wherein the second stress is between the first and third stresses.

7. The method of claim 1 wherein the first treatment comprises implanting the first portion with stress relaxing ions.

8. The method of claim 7 wherein the stress relaxing ions comprises Ge, Xe or a combination thereof.

9. The method of claim 1 wherein the second treatment comprises a UV treatment.

10. The method of claim 1 further comprising depositing an interlevel dielectric layer over the continuous first stress liner.

11. The method of claim 1 wherein the continuous first stress liner has a smooth interface between the first and second portions of the continuous first stress liner.

12. A method of forming a device comprising:

providing a substrate having first and second regions;

depositing a single continuous first stress liner on the substrate, wherein the single continuous first stress liner has equal thickness and same material throughout the entire liner and comprises a first stress; and

forming a mask to protect a second portion of the single continuous first stress liner in the second region while leaving a first portion of the single continuous first stress liner in the first region exposed;

performing a first stress treatment selectively on the first portion of the single continuous first stress liner over the first region to convert the first stress in the first portion to a second stress;

removing the mask over the second portion of the single continuous first stress liner; and

performing a second stress treatment non-selectively on both the first and second portions of the single continuous first stress liner, wherein the second treatment converts the second stress in the first portion to a third stress.

13. The method of claim 12 wherein:

the first and second regions are first and second transistor regions for first and second type transistors;

the first type comprises p-type;

the second type comprises n-type;

the first stress comprises compressive stress;

the third stress comprises tensile stress; and

wherein the second stress is between the first and third stresses.

14. The method of claim 12 wherein:

the first and second regions are first and second transistor regions for first and second type transistors;

the first type comprises n-type;

the second type comprises p-type;

the first stress comprises tensile stress;

the third stress comprises compressive stress; and

wherein the second stress is between the first and third stresses.

15. The method of claim 12 wherein:

the first type comprises n-type, the second type comprises p-type, the first stress comprises tensile stress and the third stress comprises compressive stress; or

the first type comprises p-type, the second type comprises n-type, the first stress comprises compressive stress and the third stress comprises tensile stress; and

wherein the second stress is between the first and third stresses.

16. The method of claim 12 wherein:

the first treatment comprises implanting the first portion with stress relaxing ions; and

the second treatment comprises exposing the first and second portions of the single continuous first stress liner with UV radiation.

17. The method of claim 16 wherein the stress relaxing ions comprises Ge, Xe or a combination thereof.

18. The method of claim 12 further comprising depositing a interlevel dielectric layer over the single continuous first stress liner.

19. The method of claim 12 wherein the single continuous first stress liner has a smooth interface between its first and second portions.

20. The method of claim 12 wherein the second treatment comprises exposing the first and second portions of the single continuous first stress liner with UV radiation.

21. A method of forming a device comprising:

providing a substrate having first and second regions;

depositing a continuous stress layer on the substrate over the first and second regions, the continuous stress layer comprising a first stress; and

performing first and second stress treatments on the continuous stress layer to transform the first stress of a first portion of the continuous stress layer over the first region to a second stress and the second stress to a third stress, wherein

one of first and second treatments on the continuous stress layer is selective to the first portion of the continuous stress layer over the first region and not a second portion of the continuous stress layer over the second region, and

other of the first and second treatments on the continuous stress layer is non-selective to both the first and second regions.

22. A method of forming a device comprising:

providing a substrate having a first region;

forming a continuous first stress layer on the substrate, the continuous first stress layer comprising a first stress, the continuous first stress layer covers the substrate including the first region;

performing a first stress treatment on the continuous first stress layer to transform the first stress to a second stress, wherein the first treatment comprises a non-etch treatment; and

performing a second stress treatment on the continuous first stress layer with the second stress to transform the second stress to a third stress.

23. The method of claim 22 wherein:

one of first and second treatments on the continuous first stress layer is selective to a portion of the continuous first stress layer over the first region; and

other of the first and second treatments on the continuous first stress layer is a non-selective stress treatment.

24. The method of claim 22 wherein:

the first treatment on the continuous first stress layer is selective to a portion of the continuous first stress layer over the first region, and

the second treatment on the continuous first stress layer is a non-selective stress treatment.