Ultraviolet blocking structure and method for semiconductor device
View Patent ↗Structures and methods for blocking ultraviolet rays during a film depositing process for semiconductor device are disclosed. In one embodiment, a semiconductor device includes an oxide-nitride-oxide (ONO) film formed on a semiconductor substrate, a gate electrode formed on the ONO film, a lower layer insulation film formed on the ONO film and the gate electrode, and a ultraviolet (UV) blocking layer based on a plurality of granular particles scattered in at least one insulation film formed on lower layer insulation film, where the UV blocking layer suppresses UV rays generated during an additional film deposition from reaching the ONO film.
1. A semiconductor device comprising:
an oxide-nitride-oxide (ONO) film formed on a semiconductor substrate;
a gate electrode formed on the ONO film;
a lower layer insulation film formed on the ONO film and the gate electrode; and
an ultraviolet (UV) blocking layer comprising
a plurality of granular particles scattered in one or more insulation films formed on the lower layer insulation film,
wherein each particle of the plurality of granular particles has a first extinction coefficient,
wherein each insulation film of the one or more insulation films has a second extinction coefficient,
wherein the first extinction coefficient of a first particle is higher than the second extinction coefficient of a first insulation film corresponding to the first particle,
wherein at least one of the one or more insulation films comprises Boron-Phosphorous Silicate Glass (BPSG), and
a plurality of stacked curved portions physically separated by a plurality of metal plugs above the lower layer insulation film and the ONO film,
wherein at least a first metal plug of the plurality of metal plugs contacts the semiconductor substrate.
2. The semiconductor device according to claim 1 , further comprising an upper layer insulation film deposited on the UV blocking layer.
3. The semiconductor device according to claim 2 , further comprising a plurality of bitlines formed in the semiconductor substrate and below the ONO film.
4. The semiconductor device according to claim 3 , further comprising at least a second metal plug of the plurality of metal plugs coupled to the gate electrode or at least one of the plurality of bitlines,
wherein the at least a second metal plug is formed above and connects to the gate electrode by piercing through the upper layer insulation film, the UV blocking layer, and the lower layer insulation film, and
wherein the at least a second metal plug is formed above and connects to the at least one of the plurality of bitlines by piercing through the upper layer insulation film, the UV blocking layer, the lower layer insulation film, and the ONO film.
5. The semiconductor device according to claim 4 ,
wherein the one or more insulation films comprise a plurality of layered insulation films, and
wherein the plurality of granular particles comprises a plurality of silicon particles.
6. The semiconductor device according to claim 5 , wherein each of the plurality of layered insulation films is approximately 10 nm in thickness.
7. The semiconductor device according to claim 5 , wherein the plurality of silicon particles are scattered in a lengthwise direction in the each of the plurality of layered insulation films.
8. The semiconductor device according to claim 4 , wherein the one or more insulation films comprise a single layer insulation film, and
wherein the single layer insulation film comprises a plurality of silicon particles.
9. The semiconductor device according to claim 8 , wherein the plurality of silicon particles are scattered in the single layer insulation film in a lengthwise direction and in a widthwise direction.
10. The semiconductor device according to claim 9 , wherein the single layer insulation film is approximately 15 nm in thickness.
11. The semiconductor device according to claim 4 , wherein the one or more insulation films comprise a single layer insulation film.
12. The semiconductor device according to claim 1 , wherein the each particle of the plurality of granular particles measures about 1 nm to about 10 nm in diameter.
13. The semiconductor device according to claim 4 , wherein the each particle of the plurality of granular particles is not in contact with any other of the plurality of granular particles.
14. The semiconductor device according to claim 4 ,
wherein at least one particle of the plurality of granular particles is not in contact with any other particle of the plurality of granular particles, and
wherein not all of the plurality of granular particles are separated from the others.
15. The semiconductor device according to claim 5 , wherein the plurality of layered insulation films comprises four layered insulation films.
16. The semiconductor device according to claim 5 , wherein the plurality of layered insulation films comprises five or six layered insulation films.
17. The semiconductor device according to claim 1 , wherein the lower layer insulation film formed on the ONO film and the gate electrode comprises an upper surface that is flat.
18. The semiconductor device according to claim 4 , wherein at least one of the plurality of metal plugs comprises tungsten.