IP Library Granted Patent US 7,859,045
Granted Patent B2
US 7,859,045 · App. 12/139,720 · Granted Dec 28, 2010

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 7,859,045
App. No.
12/139,720
Granted
Dec 28, 2010
Kind
B2
Abstract

Disclosed is a method of manufacturing a semiconductor device, which includes exposing a photoresist using an exposing mask provided with a light-shielding pattern having two or more narrow width portions, developing the photoresist to form a plurality of stripe-shaped resist patterns, selectively etching a first conductive film using the resist pattern as a mask, forming an intermediate insulating film on the first conductive film, forming a second conductive film on the intermediate insulating film, and forming, by patterning the first conductive film, the intermediate insulating film, and the second conductive film, a flash memory cell and a structure constructed by forming a lower conductor pattern, a segment of the intermediate insulating film, and a dummy gate electrode in this stacking order.

Claims (13)

1. A semiconductor device, comprising:

a semiconductor substrate;

a plurality of stripe-shaped active regions which are defined in the semiconductor substrate and are arranged in parallel with each other, each of the active regions being arranged at a distance from each other;

a device isolation insulating film which is formed on the semiconductor substrate and surrounds the active regions;

a flash memory cell including a tunnel insulating film, a floating gate, an intermediate insulating film, and a control gate which are formed on the active region in this order;

island-like lower conductor patterns made of the same material as the floating gate, where the lower conductor patterns being formed on the device isolation insulating film at an end of the active regions, and each of the lower conductor patterns being corresponding to each of the active regions;

a segment of the intermediate insulating film which covers each of the lower conductor patterns and is shared by the lower conductor patterns;

a dummy conductor pattern which is formed on the segment of the intermediate insulating film and is shared by the lower conductor patterns, the dummy conductor pattern being made of the same material as the control gate; and

a fence of the intermediate insulating film which are formed on the device isolation insulating film and extends from a side surface of the floating gate to a side surface of the lower conductor pattern along the active region,

wherein a part of the lower conductor pattern is rounded per a planar view.

2. The semiconductor device according to claim 1 , wherein the control gate and the dummy conductor pattern are stripe-shaped and extend in parallel with each other in a direction perpendicular to a direction in which the active regions extend.

3. The semiconductor device according to claim 1 , wherein the intermediate insulating film is made of an ONO film.

4. The semiconductor device according to claim 1 , wherein the dummy conductor pattern includes polysilicon.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2008
From: NAKAGAWA, SHINICHI; SANNOMIYA, ITSURO
To: FUJITSU LIMITED
Reel/Frame 021267/0245 →