IP Library Granted Patent US 7,629,623
Granted Patent B2
US 7,629,623 · App. 12/139,807 · Granted Dec 8, 2009

Nitride-based semiconductor device and method of fabricating the same

Assignee: Sanyo Electric Co., Ltd.
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Quick Facts
Patent No.
US 7,629,623
App. No.
12/139,807
Granted
Dec 8, 2009
Kind
B2
Abstract

A method of fabricating a nitride-based semiconductor device capable of reducing contact resistance between a nitrogen face of a nitride-based semiconductor substrate or the like and an electrode is provided. This method of fabricating a nitride-based semiconductor device comprises steps of etching the back surface of a first semiconductor layer consisting of either an n-type nitride-based semiconductor layer or a nitride-based semiconductor substrate having a wurtzite structure and thereafter forming an n-side electrode on the etched back surface of the first semiconductor layer.

Claims (38)

1. A nitride-based semiconductor device comprising:

a first semiconductor layer, consisting of either an n-type nitride-based semiconductor layer having a wurtzite structure or an n-type nitride-based semiconductor substrate having a wurtzite structure; and

an n-side electrode formed on a back surface of said first semiconductor layer,

wherein a dislocation density is not more than 1×10 9 cm −2 at the back surface, and

contact resistance between said n-side electrode and said first semiconductor layer is not more than 0.05 Ωcm 2 .

2. The nitride-based semiconductor device according to claim 1 , wherein said dislocation density is not more than 1×10 6 cm −2 at the back surface.

3. The nitride-based semiconductor device according to claim 1 , wherein the back surface of said first semiconductor layer includes a nitrogen face of said first semiconductor layer.

4. A nitride-based semiconductor device comprising:

a first semiconductor layer, consisting of either an n-type nitride-based semiconductor layer having a wurtzite structure or an n-type nitride-based semiconductor substrate having a wurtzite structure; and

an n-side electrode formed on a processed back surface of said first semiconductor layer,

wherein a dislocation density is not more than 1×10 9 cm −2 at the back surface, and

contact resistance between said n-side electrode and said first semiconductor layer is not more than 0.05 Ωcm 2 .

5. The nitride-based semiconductor device according to claim 1 , wherein said first semiconductor layer includes oxygen as an n-type dopant.

6. The nitride-based semiconductor device according to claim 5 , further comprising an n-type nitride semiconductor layer on said first semiconductor layer, said n-type nitride semiconductor layer doped either Si, Se, or Ge.

7. The nitride-based semiconductor device according to claim 1 , wherein the substrate carrier concentration of the n-type semiconductor is at least 5×10 18 cm −3 .

8. The nitride-based semiconductor device according to claim 1 , wherein the back surface of said first semiconductor layer has a flatter mirror surface as compared with that worked only by mechanical polishing.

9. The nitride-based semiconductor device according to claim 1 , wherein the back surface of said first semiconductor layer has a lower dislocation density as compared with that worked only by mechanical polishing.

10. The nitride-based semiconductor device according to claim 1 , wherein said first semiconductor layer has a thickness of not more than 180 μm.

11. A nitride-based semiconductor device comprising:

a first semiconductor layer, consisting of either an n-type nitride-based semiconductor layer having a wurtzite structure or an n-type nitride-based semiconductor substrate having a wurtzite structure; and

an n-side electrode formed on a back surface of said first semiconductor layer,

wherein a dislocation density is not more than 1×10 6 cm −2 in the vicinity of the interface between said first semiconductor layer and said n-side electrode and

contact resistance between said n-side electrode and said first semiconductor layer is not more than 0.05 Ωcm 2 .

12. The nitride-based semiconductor device according to claim 11 , wherein an electron carrier concentration is at least 1×10 17 cm −3 in the vicinity of the interface between said first semiconductor layer and said n-side electrode.

13. The nitride-based semiconductor device according to claim 11 , wherein the back surface of said first semiconductor layer includes a nitrogen face of said first semiconductor layer.

14. The nitride-based semiconductor device according to claim 11 , wherein the vicinity of the interface between said first semiconductor layer and said n-side electrode has a lower dislocation density as compared with that worked only by mechanical polishing.

15. The nitride-based semiconductor device according to claim 11 , wherein said first semiconductor layer includes oxygen as an n-type dopant.

16. The nitride-based semiconductor device according to claim 15 , further comprising an n-type nitride semiconductor layer on said first semiconductor layer, said n-type nitride semiconductor layer doped either-Si, Se, or Ge.

17. The nitride-based semiconductor device according to claim 11 , wherein said first semiconductor layer has a thickness of not more than 180 μm.

18. The nitride-based semiconductor device according to claim 11 , wherein the substrate carrier concentration of the n-type semiconductor is at least 5×10 18 cm −3 .

19. The nitride-based semiconductor device according to claim 11 , wherein the back surface of said first semiconductor layer has a flatter mirror surface as compared with that worked only by mechanical polishing.

20. The nitride-based semiconductor device according to claim 11 , wherein the electron carrier concentration in the vicinity of the interface between said first semiconductor layer and said n-side electrode is at least 1.0×10 18 cm −3 .

21. The nitride-based semiconductor device according to claim 11 , wherein the level of the electron carrier concentration in the vicinity of the interface between said first semiconductor layer and said n-side electrode is substantially identical to that of the first semiconductor layer.

22. The nitride-based semiconductor device according to claim 4 , wherein said dislocation density is not more than 1×10 6 cm −2 at the back surface.

23. The nitride-based semiconductor device according to claim 4 , wherein the back surface of said first semiconductor layer includes a nitrogen face of said first semiconductor layer.

24. The nitride-based semiconductor device according to claim 4 , wherein the back surface of said first semiconductor layer has a flatter mirror surface as compared with that worked only by mechanical polishing.

25. The nitride-based semiconductor device according to claim 4 , wherein the back surface of said first semiconductor layer has a lower dislocation density as compared with that worked only by mechanical polishing.

26. The nitride-based semiconductor device according to claim 4 , wherein said first semiconductor layer has a thickness of not more than 180 μm.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2016
From: FUTURE LIGHT LIMITED LIABILITY COMPANY
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 040523/0797 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2012
From: SANYO ELECTRIC CO., LTD.
To: FUTURE LIGHT, LLC
Reel/Frame 029296/0409 →
Priority Claims (1)
JP 2002-085085 · Mar 26, 2002 · national
Continuity (6)
Continuation 1180670900 · Jun 4, 2007
Continuation 1160789600 · Dec 4, 2006
Division 1111419300 · Apr 26, 2005
Division 1093649900 · Sep 9, 2004
Division 1039426000 · Mar 24, 2003
Related Publication 20080315221A1 · Dec 25, 2008