Voltage reference device and methods thereof
View Patent ↗A voltage reference module of an integrated circuit device includes a current source to apply a current to a set of voltage cells, thereby generating a voltage drop across each cell. The voltage cells are configured such that the individual voltage drop associated with each cell in response to the application of the current is relatively stable over a temperature range. The voltage reference module generates a voltage based on the voltage drops across the voltage cells, and therefore the generated voltage is also stable over the temperature range. Bypass switches can be connected across each voltage cell whereby the switches can be individually opened and closed to include or exclude cells in generation of the reference voltage. In an embodiment, the switches are set during a trimming process for the integrated circuit device so that the voltage reference module provides a specified voltage.
1. A method comprising:
selecting a subset of zero temperature coefficient (ZTC) cells from a plurality of ZTC cells, each of the plurality of ZTC cells configured to provide a substantially constant voltage drop over a temperature range in response to application of a current; and
applying the current to the subset of ZTC cells to generate a reference voltage for an integrated circuit device.
2. The method of claim 1 , wherein the temperature range is a range of −40 degrees Celsius to +150 degrees Celsius.
3. The method of claim 1 , wherein a voltage drop over one of the first subset of ZTC cells varies less than 15 percent over the temperature range.
4. The method of claim 1 , wherein a voltage drop over one of the first subset of ZTC cells varies less than 5 percent over the temperature range.
5. The method of claim 1 , where selecting the subset of ZTC cells comprises programming a plurality of switches based on stored trimming information.
6. The method of claim 1 , wherein the plurality of ZTC cells comprises a first ZTC cell and a second ZTC cell, and wherein selecting the subset of ZTC cells comprises:
selecting the first ZTC cell;
applying the current to the first ZTC cell in response to selecting the first ZTC cell;
determining if a first voltage generated by the plurality of ZTC cells exceeds a threshold in response to applying the current to the first ZTC cell; and
selecting the second ZTC cell in response to determining that the first voltage does not exceed the threshold.
7. The method of claim 6 , wherein determining if the first voltage exceeds the threshold comprises determining if the first voltage exceeds the threshold in response to a power-on reset event at the integrated circuit device.
8. The method of claim 7 , wherein the threshold comprises a second voltage generated by a voltage reference module.
9. The method of claim 8 , wherein the voltage reference module comprises a bandgap voltage reference.
10. The method of claim 8 , further comprising reducing the second voltage in response to determining the first voltage exceeds the threshold.
11. The method of claim 1 , wherein the plurality of ZTC cells comprises a first ZTC cell and a second ZTC cell, and wherein selecting the subset of ZTC cells comprises:
applying the current to the first ZTC cell and the second ZTC cell;
determining if a first voltage generated by the plurality of ZTC cells exceeds a threshold in response to applying the current to the first ZTC cell; and
halting application of the current to the second ZTC cell in response to determining the first voltage exceeds the threshold.
12. The method of claim 1 wherein one of the first plurality of ZTC cells comprises:
a first resistor having a first terminal and a second terminal, the first resistor having a positive temperature coefficient; and
a second resistor having a first terminal connected to the second terminal of the first resistor, and a second terminal, the second resistor having a negative temperature coefficient.
13. The method of claim 1 wherein one of the plurality of ZTC cells comprises a transistor comprising a first current electrode, a second current electrode, and a control electrode coupled to the first current electrode.
14. The method of claim 1 , wherein:
a first ZTC cell of the plurality of ZTC cells comprises:
a first resistor having a first terminal and a second terminal, the first resistor having a positive temperature coefficient; and
a second resistor having a first terminal connected to the second terminal of the first resistor, the second resistor having a negative temperature coefficient; and
a second ZTC cell of the plurality of ZTC cells comprises a transistor comprising a first current electrode, a second current electrode, and a control electrode coupled to the first current electrode.
15. A method, comprising:
applying a current to a first zero temperature coefficient (ZTC) cell of a plurality of ZTC cells to generate a first voltage, each of the plurality of ZTC cells configured to provide a substantially constant voltage drop over a temperature range in response to application of the current;
altering application of the current to a second ZTC cell of the plurality of ZTC cells in response to determining that the first voltage does not match a second voltage within a tolerance; and
generating a reference voltage for an integrated circuit device in response to application of the current to the plurality of ZTC cells.
16. The method of claim 15 , wherein altering application of the current comprises applying the current to the second ZTC cell.
17. The method of claim 15 , wherein altering application of the current comprises halting application of the current to the second ZTC cell.
18. A device comprising:
an output configured to provide a reference voltage for a functional module of an integrated circuit device;
a current source comprising an output configured to provide a current;
a first zero temperature coefficient (ZTC) cell having a first terminal coupled to the output, and a second terminal, the first ZTC cell configured to provide a first substantially constant voltage drop over a temperature range;
a first switch having a first terminal connected to the first terminal of the first ZTC cell, a second terminal connected to the second terminal of the first ZTC cell, and a control input configured to receive a first control signal, the first switch configured to be placed in an open or closed state based on the first control signal;
a second ZTC cell having a first terminal coupled to the second terminal of the first ZTC cell, and a second terminal coupled to a voltage reference, the second ZTC cell configured to provide a second substantially constant voltage drop over the temperature range; and
a second switch having a first terminal connected to the first terminal of the second ZTC cell, a second terminal connected to the second terminal of the second ZTC cell, and a control input configured to receive a second control signal, the second switch configured to be placed in an open or closed state based on the second control signal.
19. The device of claim 18 wherein one of the first zero temperature coefficient cell and the second zero temperature coefficient cell comprises:
a first resistor comprising a first terminal and a second terminal, the first resistor having a positive temperature coefficient; and
a second resistor comprising a first terminal connected to the second terminal of the first resistor, and a second terminal, the second resistor having a negative temperature coefficient.
20. The device of claim 18 wherein one of the first ZTC cell and the second ZTC cell comprises:
a transistor having a first current electrode coupled to the first terminal of the one of the first zero temperature coefficient cell and the second zero temperature coefficient cell, a second current electrode coupled to the second terminal of the one of the first zero temperature coefficient cell and the second zero temperature coefficient cell, and a control electrode connected to the first current electrode.