Method for manufacturing a semiconductor-on-insulator substrate for microelectronics and optoelectronics

1. A method for manufacturing a semiconductor-on-insulator substrate for at least one of microelectronics and optoelectronics, comprising the steps of:

supplying a substrate comprising a support having one face made of a dielectric material supporting a strained silicon thin layer having a <110> or <111> orientation;

forming a first mask on a portion of the strained silicon thin layer;

epitaxy of Si 1-x Ge x on a portion of the layer not masked by the first mask;

high-temperature oxidating, according to a germanium condensation technique, until a strained germanium layer is obtained, which rests on the face of the support made of a dielectric material, the strained germanium layer then being covered by a silicon oxide layer;

eliminating the first mask and of the silicon oxide layer, thereby exposing a semi-conducting thin layer comprising said strained silicon portion and a remaining strained germanium portion;

forming a second mask on said semi-conducting thin layer exposed via said step of eliminating, the second mask protecting a region of the remaining strained germanium portion and at least one region of the strained silicon portion, the second mask exposing a remaining strained germanium portion;

epitaxial growing germanium on the remaining strained germanium portion, in order to obtain a germanium thick layer; and

eliminating the second mask.

2. The method of claim 1 , wherein the dielectric material of the support is a material chosen from at least one of SiO 2 , Si 3 N 4 and Al 2 O 3 .

3. The method as claimed in any of claims 1 or 2 , wherein the step for supplying a substrate includes:

epitaxial growing a thick, that is relaxed, SiGe layer on a initial silicon substrate having a <110> or <111> orientation;

epitaxial growing said strained silicon thin layer from the SiGe thick layer;

forming a silicon oxide layer on said strained silicon thin layer;

bonding of a handle substrate to the free face of the silicon oxide layer; and

separating the resulting structure in order to eliminate the portion of the structure comprising the initial substrate and the SiGe thick layer.

4. The method of claim 3 , wherein provisions are made for an ion implantation step, prior to the handle substrate bonding step, in the SiGe thick layer, in order to produce an embrittled layer therein, the separation step then comprising a step for cleaving the structure in the area of the embrittled layer and a step for removing the SiGe remaining on the strained silicon thin layer.

5. The method of claim 4 , wherein the cleaving step includes a heat treatment of the embrittled layer.

6. The method as claimed in claim 1 , wherein the first mask includes a silicon oxide layer formed on the strained silicon thin layer and covered with a silicon nitride layer.

7. The method as claimed in claim 1 , wherein the second mask includes a silicon nitride layer.