IP Library Granted Patent US 8,223,105
Granted Patent B2
US 8,223,105 · App. 12/153,128 · Granted Jul 17, 2012

LCD controller and LCD control method

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Quick Facts
Patent No.
US 8,223,105
App. No.
12/153,128
Granted
Jul 17, 2012
Kind
B2
Abstract

A liquid crystal display (LCD) controller includes a plurality of segment/key source control circuits connected with an LCD panel and a key matrix through a plurality of segment/key source terminals, to periodically output a signal for one frame which contains a display output period and a key source output period. The plurality of segment/key source control circuits output to the plurality of segment/key source terminals during the display output period, segment signals having display drive voltages indicating a maximum value, a minimum value, and intermediate values between the maximum value and the minimum value. The plurality of segment/key source control circuits output first key scan pulse signals varying between the maximum value and the minimum value to the plurality of segment/key source terminals during the key source output period in a key scan state when the key matrix has been operated, and then, second key scan pulse signals obtained by inverting the first key scan pulse signals to the corresponding segment/key source terminal.

Claims (36)

1. A liquid crystal display (LCD) controller comprising:

a plurality of segment/key source control circuits connected with an LCD panel and a key matrix through a plurality of segment/key source terminals, to periodically output a signal for one frame which contains a display output period and a key source output period,

wherein each of said plurality of segment/key source control circuits:

outputs a segment signal to a corresponding one of said plurality of segment/key source terminals during the display output period, wherein the segment signal has a display drive voltage indicating a maximum value, a minimum value, and intermediate values between the maximum value and the minimum value, and

outputs a first key scan pulse signal varying between the maximum value and the minimum value to a corresponding one of said plurality of segment/key source terminals during the key source output period in a key scan state when said key matrix has been operated, and

then, outputs a second key scan pulse signal obtained by inverting the first key scan pulse signals to the corresponding segment/key source terminal.

2. The LCD controller according to claim 1 , wherein the key source output period contains a first-half key source output period and a second-half key source output period, and

said plurality of segment/key source control circuits output first key scan pulse signals to said plurality of segment/key source terminals during the first-half key source output period in said key scan state, and output second key scan pulse signals to said plurality of segment/key source terminals during the second-half key source output period.

3. The LCD controller according to claim 2 , wherein said plurality of segment/key source control circuits output first key-in wait signals indicating one of the maximum values and the minimum values to said plurality of segment/key source terminals during the first-half key source output period, and second key-in wait signals indicating the other of the maximum values and the minimum values to said plurality of segment/key source terminals during the second-half key source output period, in a key-in wait state that said key matrix is not operated.

4. The LCD controller according to claim 2 , further comprising:

a plurality of COM control circuits connected with said LCD panel through a plurality of common terminals to periodically output a signal for one frame containing the display output period and the key source output period,

wherein said plurality of COM control circuits output to said plurality of common terminals during the display output period, common signals having display drive voltages indicating the maximum value, the minimum value and intermediate values between the maximum value and the minimum value,

the intermediate values contain a first intermediate value between the maximum value and the minimum value and a second intermediate value obtained by subtracting the first intermediate value from the maximum value, and

said plurality of COM control circuits output first non-display signals indicating one of the first intermediate value and the second intermediate value to said plurality of common terminals during the first-half key source output period, and output second non-display signals indicating the other of the first intermediate value and the second intermediate value to said plurality of common terminals during the second-half key source output period.

5. The LCD controller according to claim 1 , wherein said plurality of segment/key source control circuits output first key scan pulse signals to said plurality of segment/key source terminals at different timings, and output second key scan pulse signals to said plurality of segment/key source terminals at different timings, during the key source output period in the key scan state.

6. The LCD controller according to claim 1 , wherein said plurality of segment/source control circuits output first key scan pulse signals to said plurality of segment/key source terminals at different timings, and output the second key scan pulse signals to said plurality of segment/key source terminals at different timings, over plural periods during the key source output period in the key scan state.

7. A (liquid crystal display) LCD control method comprising:

periodically outputting a signal for one frame which contains a display output period and a key source output period,

wherein said outputting comprises:

carrying out a first output of segment signals to a plurality of segment/key source terminals during the display output period, wherein the segment signal has a display drive voltage indicating a maximum value, a minimum value, and intermediate values between the maximum value and the minimum value, and

carrying out a second output of first key scan pulse signals varying between the maximum value and the minimum value to said plurality of segment/key source terminals, and then, second key scan pulse signals obtained by inverting the first key scan pulse signals to said plurality of segment/key source terminals, during the key source output period in a key scan state when a key matrix has been operated.

8. The LCD control method according to claim 7 , wherein the key source output period contains a first-half key source output period and a second-half key source output period, and

said carrying out a second output comprises:

outputting first key scan pulse signals to said plurality of segment/key source terminals during the first-half key source output period, and second key scan pulse signals to said plurality of segment/key source terminals during the second-half key source output period, in said key scan state.

9. The LCD control method according to claim 8 , wherein said carrying out a second output further comprises:

outputting first key-in wait signals indicating one of the maximum values and the minimum values to said plurality of segment/key source terminals during the first-half key source output period, and second key-in wait signals indicating the other of the maximum values and the minimum values to said plurality of segment/key source terminals during the second-half key source output period, in a key-in wait state that said key matrix is not operated.

10. The LCD control method according to claim 8 , wherein said outputting further comprises:

carrying out a third output to a plurality of common terminals during the display output period, of common signals having display drive voltages indicating the maximum value, the minimum value and intermediate values between the maximum value and the minimum value,

the intermediate values contain a first intermediate value between the maximum value and the minimum value and a second intermediate value obtained by subtracting the first intermediate value from the maximum value, and

said carrying out a third output comprises:

outputting first non-display signals indicating one of the first intermediate value and the second intermediate value to said plurality of common terminals during the first-half key source output period; and

outputting second non-display signals indicating the other of the first intermediate value and the second intermediate value to said plurality of common terminals during the second-half key source output period.

11. The LCD control method according to claim 7 , wherein said carrying out a second output comprises:

outputting first key scan pulse signals to said plurality of segment/key source terminals at different timings, and second key scan pulse signals to said plurality of segment/key source terminals at different timings, during the key source output period in the key scan state.

12. The LCD control method according to claim 7 , wherein said carrying out a second output comprises:

outputting first key scan pulse signals to said plurality of segment/key source terminals at different timings, and the second key scan pulse signals to said plurality of segment/key source terminals at different timings, over plural periods during the key source output period in the key scan state.

Assignments (2)
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0696 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2008
From: SHIRAISHI, NAOYUKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021003/0750 →