Semiconductor device and method for manufacturing the same
View Patent ↗An impurity buried layer constructed by two buried regions formed by impurities of identical type exist, a buried region formed by an impurity having a slow diffusion speed is provided on the entire surface of a transistor formation region, and a buried region formed by an impurity having a fast diffusion speed is provided inwardly from beneath the inside end of an isolation insulating film serving as a region on which an electric field concentrates partially.
1. A semiconductor device including a vertical double-diffused metal-oxide-semiconductor (VDMOS) transistor, said semiconductor device comprising:
a semiconductor layer;
a drift region formed at a surface of the semiconductor layer;
plural body regions formed in the drift region, each of the plural body regions including a source region of a predetermined conductivity type;
a drain extracting region of the predetermined conductivity type enclosing an outer circumference of the drift region, the drain extracting region having a higher impurity concentration than an impurity concentration of the drift region;
a separation insulating film formed on the semiconductor layer to enclose the outer circumference of the drift region,
a gate electrode formed on the semiconductor layer over at least one of the body regions, the gate electrode providing an opening over the source region; and
a buried layer of the predetermined conductivity type, in the semiconductor layer having a higher impurity concentration than the impurity concentration of the drift region, and comprising a drain region,
wherein the buried layer includes a first buried region formed below an entire region of the drift region and the drain extracting region, and a second buried region being protruded from the center of the first buried region and spaced apart from the drain extracting region,
wherein the entire upper surface of the first buried region is planar.
2. The semiconductor device according to claim 1 , wherein the first buried region and the second buried region respectively comprise a first impurity and a second impurity, different from the first impurity, as principal components of the predetermined conductivity type, and the second impurity has a faster diffusion speed than a diffusion speed of the first impurity.
3. The semiconductor device according to claim 1 , wherein the first buried region and the second buried region respectively comprise a first impurity and a second impurity, different from the first impurity, as principal components of the predetermined conductivity type, and a combination of the first impurity and the second impurity is one of As and P, Sb and P, and Sb and As, in that order.
4. The semiconductor device according to claim 1 , wherein the separation insulating film is disposed inside the drift region and the drain extracting region.
5. The semiconductor device according to claim 1 , wherein the separation insulating film spaces an uppermost portion of the drift region from an uppermost portion of the drain extracting region.
6. The semiconductor device according to claim 1 , wherein, in a plan view, the separation insulating film overlaps the drift region and the drain extracting region.
7. The semiconductor device according to claim 1 , wherein the separation insulating film abuts the drift region and the drain extracting region.
8. The semiconductor device according to claim 1 , wherein the separation insulating film abuts a boundary of the drift region with the drain extracting region.
9. The semiconductor device according to claim 1 , wherein, in a plan view, the separation insulating film is placed outside the second buried region.
10. The semiconductor device according to claim 1 , wherein, in a plan view, a part of the drift region spaces apart the separation insulating film from the second buried region.
11. A semiconductor device, comprising:
a semiconductor layer;
a drift region formed at a surface of the semiconductor layer;
plural body regions formed in the drift region, each of the plural body regions including a source region of a predetermined conductivity type;
a drain extracting region of the predetermined conductivity type enclosing an outer circumference of the drift region;
a separation insulating film formed on the semiconductor layer to enclose the outer circumference of the drift region;
a gate electrode formed on the semiconductor layer over at least one of the body regions, the gate electrode providing an opening over the source region; and
a buried layer of the predetermined conductivity type, in the semiconductor layer, having a higher impurity concentration than an impurity concentration of the drift region, and comprising a drain region,
wherein the buried layer includes a first buried region formed below an entire region of the drift region and the drain extracting region, and a second buried region being protruded from the center of the first buried region and spaced apart from the drain extracting region;
wherein the entire upper surface of the first buried region is planar.
12. The semiconductor device according to claim 11 , wherein the separation insulating film separates an uppermost region of the drift region from an uppermost region of the drain extracting region in the semiconductor layer.
13. The semiconductor device according to claim 11 , wherein the drain extracting region has a higher impurity concentration than an impurity concentration of the drift region.