Semiconductor device
View Patent ↗In a semiconductor device including a bipolar transistor, a base region has a two layer structure including a first base region, and a second base region which is provided around the first base region and has a lower impurity density than that of the first base region and has a shallower depth than that of the first base region.
1. A semiconductor device including a bipolar transistor, comprising:
a semiconductor layer;
a first-conductive-type deep well formed on a surface of the semiconductor layer;
a second-conductive-type first base region formed on the surface of the semiconductor layer and formed in the deep well;
a first-conductive-type collector extraction region provided apart from the first base region on the surface of the semiconductor;
a second-conductive-type second base region formed in the deep well and provided between the first base region and the collector extraction region on the surface of the semiconductor layer; and
an element separation insulating layer formed between the collector extraction region and the first base region, and formed on the second base region,
wherein the second base region is connected to the first base region, and having an impurity concentration lower than an impurity concentration in the first base region, and
wherein the second base region is shallower than the first base region.
2. The semiconductor device according to claim 1 , wherein the second base region is provided under the element separation insulating layer.
3. The semiconductor device according to claim 2 , wherein the second base region contacts the element separation insulating layer.
4. A semiconductor device, comprising:
an impurity buried layer;
a first-conductive-type deep well formed on a surface of the impurity buried layer;
a second-conductive-type first base region formed in the deep well;
a first-conductive-type emitter region formed on a surface of the first base region;
a first-conductive-type collector extraction region provided apart from the first base region;
a second-conductive-type second base region, formed in the deep well, provided between the first base region and the collector extraction region, the second base region being shallower than the first base region inside the deep well; and
an element separation insulating layer formed on the second base region,
wherein the impurity buried layer comprises an impurity density higher than an impurity density of the deep well, and
wherein an impurity density of the second base region is lower than an impurity density of the first base region.
5. The semiconductor device according to claim 4 , wherein the element separation insulating layer is provided between the first base region and the collector extraction region.
6. The semiconductor device according to claim 5 , wherein the impurity density of the deep well is lower than the impurity density of the impurity buried layer.
7. The semiconductor device according to claim 6 , further comprising a first-conductive-type sinker formed around the collector extraction region, the sinker having an impurity density higher than the deep well.
8. The semiconductor device according to claim 5 , further comprising a semiconductor layer including the impurity buried layer, the deep well, the first base region, the emitter region, the collector extraction region, and the second base region.
9. The semiconductor device according to claim 8 , wherein the semiconductor layer comprises:
a semiconductor substrate; and
a first-conductive-type epitaxial region formed over the semiconductor substrate.
10. The semiconductor device according to claim 9 , wherein the deep well, the first base region, and the second base region are provided in the epitaxial region.
11. The semiconductor device according to claim 5 , wherein the second base region surrounds the first base region.
12. The semiconductor device according to claim 4 , wherein the second base region is completely depleted by the first-conductive-type impurities in the deep well when a predetermined voltage not more than an avalanche breakdown voltage is applied to the collector extraction region.
13. The semiconductor device according to claim 4 , wherein the second base region forms a depletion region when a voltage greater than a predetermined collector voltage is applied thereto.
14. The semiconductor device according to claim 4 , wherein the second base region is configured to be more easily depleted than the first base region.
15. The semiconductor device according to claim 14 , wherein the second base region is configured to be completely depleted by first conductive-type impurities in the deep well when a predetermined voltage equal to or lower than an avalanche breakdown voltage of a bipolar transistor is applied to the collector extraction region.
16. The semiconductor device according to claim 4 , wherein a base extraction region and an emitter region are formed in the first base region.
17. The semiconductor device according to claim 4 , wherein the second base region is provided under the element separation insulating layer.
18. The semiconductor device according to claim 17 , wherein the second base region contacts the element separation insulating layer.