Resistance variable memory with temperature tolerant materials

1. A method of forming a resistance variable memory device, comprising:

providing a substrate;

forming a conductive address line over said substrate;

forming a first insulating layer over said address line and said substrate;

forming an opening in said first insulating layer to expose a portion of said address line in said opening;

forming a first electrode layer in said opening and over said address line;

forming a Sb 2 Se 3 glass layer over said first electrode;

forming a metal-chalcogenide layer comprising tin-selenide over said Sb 2 Se 3 glass layer;

forming a first chalcogenide glass layer over said metal-chalcogenide layer;

forming a metal layer over said first chalcogenide glass layer;

forming a second chalcogenide glass layer over said metal layer;

forming a second electrode layer over said second chalcogenide glass layer; and

etching to form a stack of said Sb 2 Se 3 glass layer, said metal-chalcogenide layer, said first chalcogenide glass layer, said metal layer, said second chalcogenide glass layer, and said second electrode layer over said first electrode layer.

2. The method of claim 1 , wherein said first and second chalcogenide glass layers comprise Ge 40 Se 60 .

3. The method of claim 1 , wherein said metal-chalcogenide layer comprises silver selenide.

4. The method of claim 1 , wherein said first electrode layer comprises tungsten.

5. The method of claim 1 , wherein said second electrode comprises tungsten.

6. The method of claim 1 , wherein said metal layer comprises silver.

7. The method of claim 1 , wherein said metal layer comprises antimony.

8. The method of claim 1 , further comprising the act of forming a conducting channel within said Sb 2 Se 3 glass layer.

9. The method of claim 8 , further comprising forming a conductive pathway at said conducting channel.