IP Library Granted Patent US 8,149,553
Granted Patent B2
US 8,149,553 · App. 12/153,802 · Granted Apr 3, 2012

Electrostatic discharge event protection for an integrated circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,149,553
App. No.
12/153,802
Granted
Apr 3, 2012
Kind
B2
Abstract

An integrated circuit 2 is provided with a clamp transistor 20 for providing electrostatic discharge event protection. A detector circuit 28 produces a clamp control signal for switching the clamp transistor 20 to a conductive state so as to provide the electrostatic discharge protection. The detector circuit 28 also generates an electrostatic discharge event signal 36 which is distributed elsewhere within the integrated circuit 2 and controls a protection circuit element 60, 64, 44 to force a processing control signal 40, 52 of a signal processing transistor 38, 54 into a state in which the signal processing transistor 38, 54 is more resistant to electrostatic discharge damage. The signal processing transistors 38, 54 may be P-type field effect transistors associated with a receiver 14 or a transmitter 12 connected to an external signal communication line. The use of this active protection controlled by the electrostatic discharge event signal 36 permits smaller protection diodes 22, 24 to be use with such communication signal lines and/or provide for increased electrostatic discharge protection.

Claims (24)

1. An integrated circuit comprising:

a power supply rail;

a ground rail;

at least one signal processing transistor controlled by a processing control signal to perform signal processing;

a clamp transistor coupled between said power supply rail and said ground rail and controlled by a clamp control signal to provide a current path between said power supply rail and said ground rail; and

a detector circuit coupled to said power supply rail and said ground rail and generating said clamp control signal, said detector circuit being responsive to a change in voltage difference between said power supply rail and said ground rail indicative of an electrostatic discharge event to generate said clamp control signal with a value that switches said clamp transistor to a conductive state in which current flow through said clamp transistor suppresses said change in voltage difference; wherein

said detector circuit generates an electrostatic discharge event signal when said electrostatic discharge event is detected; and

said electrostatic discharge event signal controls a protection circuit element to force said processing control signal to a protection state in which said signal processing transistor has an increased resistance to damage from said electrostatic discharge event.

2. An integrated circuit as claimed in claim 1 , wherein said protection state is an undriven state in which said processing control signal has a floating voltage.

3. An integrated circuit as claimed in claim 2 , wherein said signal processing transistor is a P-type field effect transistor having a source connection and a drain connection with one of said source connection and said drain connection connected to an external signal line extending outside of said integrated circuit.

4. An integrated circuit as claimed in claim 3 , wherein said P-type field effect transistor is part of a serial data receiver and said external signal line is an external serial data signal line.

5. An integrated circuit as claimed in claim 1 , wherein said protection state switches said signal processing transistor to a non-conductive state.

6. An integrated circuit as claimed in claim 5 , wherein said signal processing transistor is a N-type field effect transistor having a source connection and a drain connection with one of said source connection and said drain connection connected to an external signal line extending outside of said integrated circuit.

7. An integrated circuit as claimed in claim 6 , wherein said N-type field effect transistor is part of a serial data transmitter and said external signal line is an external serial data signal line.

8. An integrated circuit as claimed in claim 7 , wherein said N-type field effect transistor is part of an output driver circuit within said serial data transmitter and said serial data transmitter further comprises a pre-driver circuit that receives serial data signals from within said integrated circuit and generates said processing control signal, said pre-driver circuit including said protection circuit element, said protection circuit element being responsive to said electrostatic discharge event signal to drive said processing control signal to a ground voltage.

9. An integrated circuit as claimed in claim 1 , wherein said signal processing transistor has at least one connection connected to an external signal line extending outside of said integrated circuit, said external signal line being coupled to one or more protection diodes coupled providing a discharge path active during said electrostatic discharge event.

10. An integrated circuit comprising:

power supply rail means for distributing a power supply signal;

ground rail means for distributing a ground signal;

at least one signal processing transistor means for performing signal processing under control of a processing control signal;

clamp transistor means coupled between said power supply rail means and said ground rail means and controlled by a clamp control signal for providing a current path between said power supply rail means and said ground rail means; and

detector means coupled to said power supply rail means and said ground rail means for generating said clamp control signal, said detector means being responsive to a change in voltage difference between said power supply rail means and said ground rail means indicative of an electrostatic discharge event to generate said clamp control signal with a value that switches said clamp transistor means to a conductive state in which current flow through said clamp transistor means suppresses said change in voltage difference; wherein

said detector means generates an electrostatic discharge event signal when said electrostatic discharge event is detected; and

said electrostatic discharge event signal controls protection means for forcing said processing control signal to a protection state in which said signal processing transistor means has an increased resistance to damage from said electrostatic discharge event.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →