IP Library Patent Application 12155710
Patent Application
App. No. 12/155,710

Display controller and method of controlling the same

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Quick Facts
Patent No.
US None
App. No.
12/155,710
Abstract

A display controller according to one embodiment of the present invention includes a control pulse generating part outputting control pulse to a data line controller and a scan line controller driving a display panel, and an intermittent clock generating part generating an intermittent clock synchronized with a reference clock and setting a clock interval based on a timing setting value setting a timing at which the control pulse changes in a predetermined period.

Claims (15)

1 . A display controller comprising:

a control pulse generating part outputting control pulse to a data line controller and a scan line controller driving a display panel; and

an intermittent clock generating part generating an intermittent clock synchronized with a reference clock and setting a clock interval based on a timing setting value setting a timing at which the control pulse changes in a predetermined period.

2 . The display controller according to claim 1 , further comprising a first setting register storing the timing setting value and a second setting register storing a relation between a timing at which the control pulse changes and a number of clocks of the intermittent clock input in a predetermined period.

3 . The display controller according to claim 1 , wherein the timing setting value is a value defining a relation between a number of clocks of the reference clock input in a predetermined period and a timing at which the control pulse changes in the predetermined period.

4 . The display controller according to claim 1 , wherein the reference clock has a frequency twice as much as a frequency of the intermittent clock.

5 . The display controller according to claim 2 , wherein the values stored in the first and second setting registers are changed based on data input from an outside.

6 . The display controller according to claim 1 , wherein the control pulse includes a plurality of control signals, and each of the plurality of control signals changes a signal level based on the intermittent clock.

7 . The display controller according to claim 1 , further comprising:

a reference clock generating part dividing a frequency of an original clock input from an outside or generated inside to generate the reference clock; and

a control register storing a setting of a frequency dividing ratio of the reference clock generating part.

8 . The display controller according to claim 1 , wherein the data line controller drives pixels arranged in columns in the display panel, and the scan line controller drives pixels arranged in rows in the display panel.

9 . A method of controlling a display controller controlling a data line controller and a scan line controller driving a display panel by using a control pulse, the method comprising:

generating an intermittent clock synchronized with a reference clock and including an interval based on a timing setting value setting a timing at which the control pulse changes, and

generating the control pulse based on the intermittent clock.

Assignments (3)
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0696 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S ADDRESS AND THE DOCKET NUMBER, PREVIOUSLY RECORDED AT REEL 021111, FRAME 0739. Recorded Jul 23, 2008
From: TANABE, MASAHIRO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021318/0632 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2008
From: TANABE, MASAHIRO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021111/0739 →