Display device

1. A display device comprising:

a plurality of pixels;

a plurality of scanning lines; and

a plurality of common lines;

a scanning line drive circuit; and

a common line drive circuit; wherein

the scanning line drive circuit has a shift register circuit and a scanning voltage generation circuit for generating a scanning voltage;

the shift register circuit has a plurality of shift pulse generation circuits for generating a first shift pulse and second shift pulse;

the scanning voltage generation circuit has a plurality of base circuits;

each one of the shift pulse generation circuits corresponds to n of the base circuits and provides shift pulse inputs to drive n gate lines, where n is an integral number of 2 or greater;

the first shift pulse and the second shift pulse generated by the shift pulse generation circuit and corresponding to each of the plurality of base circuits are input into the each of the plurality of base circuits in the scanning voltage generation circuit;

first through nth scanning line clocks are input into the plurality of base circuits, wherein a first scanning line clock is input to a respective first base circuit of the scanning voltage generation circuit and an nth scanning line clock is input to a respective nth base circuit of the scanning voltage generation circuit;

each of the plurality of base circuits in the scanning voltage generation circuit respectively has:

a first transistor including a first electrode to which the first shift pulse generated by the shift pulse generation circuit provided in the shift register circuit is input, a control electrode to which a fixed first power supply voltage is input and a second electrode, and

a second transistor including a control electrode connected to the second electrode in the first transistor, a first electrode to which one of the first through nth scanning line clocks is input, and a second electrode connected to a scanning voltage output terminal;

each of the plurality of base circuits outputs a selected scanning voltage synchronized with inputting one of the first through nth scanning line clocks from the scanning voltage output terminal when the first shift pulse that has been input is at a first voltage level, wherein

the first through nth scanning line clocks are inputted having at least one of mutually different phases relative to each other and identical phases relative to each other in response to a selection of at least one of a gate line sequential drive method and a multiple gate line drive method of the plurality of pixels, and the common line drive circuit determines an AC drive method of the plurality of pixels,

wherein the first through nth scanning line clocks have mutually different phases relative to each other in response to a selection of the gate line sequential drive method and the first through nth scanning line clocks have identical phases relative to each other in response to a selection of the multiple gate line drive method.

2. The display device of claim 1 , comprising a first capacitor between the control electrode of the second transistor and the second electrode of the second transistor.

3. The display device of claim 1 , wherein

each of the shift pulse generation circuits in the shift register circuit generate a second shift pulse whose phase differs from that of the first shift pulse;

the base circuits in the scanning voltage generation circuit further have:

a third transistor including a control electrode to which the second shift pulse generated by the shift pulse generation circuit provided in the shift register circuit is input, a first electrode to which a second power supply voltage having a voltage level that is different from that of the first power supply voltage is input, and a second electrode is connected to the scanning voltage output terminal, and

a second capacitor connected between the control electrode of the third transistor and the first electrode of the third transistor; and

each of the base circuits keep potential of the scanning voltage output terminal at the voltage level of the second power supply voltage when the second shift pulse that has been input is at the first voltage level.

4. The display device of claim 1 , wherein

the scanning line drive circuit has a common voltage generation circuit for presenting each of common electrodes with a first common voltage or a second common voltage having a voltage level that differs from that of the first common voltage, on the basis of a common electrode drive pulse output from each of the base circuits of the scanning voltage generation circuit;

the base circuits of the scanning voltage generation circuit further have a fourth transistor in which a control electrode is connected to the control electrode of the second transistor, a first electrode is connected to the first electrode of the second transistor, and a second electrode is connected to a common electrode drive pulse output terminal; and

each of the base circuits outputs the common electrode drive pulse synchronized to an inputted one of the first through nth scanning line clocks from the common electrode drive pulse output terminal when the first shift pulse that has been input is at the first voltage level.

5. The display device of claim 3 , wherein

the scanning line drive circuit has a common voltage generation circuit for presenting each of common electrodes with a first common voltage or a second common voltage having a voltage level that differs from that of the first common voltage, on the basis of a common electrode drive pulse output from each of the base circuits of the scanning voltage generation circuit;

the base circuits of the scanning voltage generation circuit further have:

a fourth transistor including a control electrode connected to the control electrode of the second transistor, a first electrode connected to the first electrode of the second transistor, and a second electrode connected to a common electrode drive pulse output terminal; and

a fifth transistor including a control electrode connected to the control electrode of the third transistor, a first electrode connected to the first electrode of the third transistor, and a second electrode connected to the common electrode drive pulse output terminal; and

each of the base circuits outputs the common electrode drive pulse synchronized to an inputted one of the first through nth scanning line clocks from the common electrode drive pulse output terminal when the first shift pulse that has been input is at the first voltage level, and hold the potential of the common electrode drive pulse output terminal at the voltage level of the second power voltage when the second shift pulse that has been input is at the first voltage level.

6. The display device of claim 3 , wherein

a point at which the first shift pulse rises (or falls) is aligned with a point at which the second shift pulse falls (or rises); and

the point at which the first shift pulse falls (or rises) differs from the point at which the second shift pulse rises (or falls).

7. The display device of claim 1 , wherein

the base circuits sequentially output a selected scanning voltage to the scanning lines corresponding to the base circuits.

8. The display device of claim 1 , wherein

the base circuits in the scanning voltage generation circuit simultaneously output a selected scanning voltage to the scanning lines corresponding to the base circuits.

9. The display device of claim 4 , wherein

common voltage generation circuits which belong to one of first through nth categories in the shift register circuit;

first to nth scanning line clocks are respectively input into the base circuits which belong to the first through nth categories;

first to nth AC signals are input respectively into the n common voltage generation circuits which belong to the first through nth categories; and

the common voltage generation circuit which belongs to nth category has:

a circuit C 1 for taking in the nth AC signal on the basis of the common electrode drive pulse output from the nth base circuit in the scanning voltage generation circuit, and

a circuit C 2 for outputting the first common voltage or the second common voltage to a common electrode corresponding to the corresponding one of the common voltage generation circuits on the basis of the AC signal taken in by the circuit C 1 .

10. The display device of claim 9 , wherein

the base circuits in the scanning voltage generation circuit sequentially output a selected scanning voltage to scanning lines corresponding to the base circuits;

the first to nth AC signals are signals having mutually different phases; and

the common voltage generation circuits alternatingly output the first common voltage and the second common voltage to the respective common electrodes.

11. The display device of claim 9 , wherein

the base circuits in the scanning voltage generation circuit simultaneously output a selected scanning voltage to the scanning lines corresponding to the n base circuits;

the first to nth AC signals are signals having mutually different phases; and

the common voltage generation circuits output voltages to the respective common electrodes so that each groups of common electrodes have input of one of the first common voltage and the second common voltage.

12. The display device of claim 9 , wherein

the first through nth AC signals are signals having mutually different phases;

the first through nth AC signals include at least one signal having a different cycle; and

the common voltage generation circuits output the first common voltage and the second common voltage alternatingly for each frame to the respective common electrodes.