Metal gate structures with recessed channel
Methods and associated structures of forming a microelectronic device are described. Those structures may comprise a transistor comprising a metal gate disposed on a gate dielectric that is disposed on a substrate, and a source/drain region disposed adjacent a channel region of the transistor. The source/drain region comprises a source/drain extension comprising a vertex point, wherein a top surface of the channel region is substantially planar with the vertex point.
1. A structure comprising:
a transistor comprising a metal gate disposed on a gate dielectric that is disposed on a substrate; and
a source/drain region disposed adjacent a channel region of the transistor, wherein the source/drain region comprises a source/drain extension comprising a vertex point, wherein an upper portion of the source/drain extension and a lower portion the source/drain extension meet, and wherein a top surface of the channel region is substantially planar with the vertex point, and wherein the gate dielectric is disposed on the upper portion of the source/drain extension and wherein the gate dielectric is not disposed on a planar portion of the source/drain extension.
2. The structure of claim 1 wherein the metal gate comprises a p type gate material.
3. The structure of claim 1 wherein the transistor structure comprises a PMOS transistor.
4. The structure of claim 1 wherein a length of the channel comprises a distance between adjacent vertices of adjacent source/drain extensions within the structure.
5. The structure of claim 1 wherein the gate dielectric comprises a first segment and a second segment.
6. The structure of claim 5 wherein the gate dielectric comprises an angle disposed between the first segment and the second segment.