SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING THE SAME
Provided is a semiconductor element which can suppress deterioration of element characteristics even when a semiconductor element section includes a plurality of directions having different thermal expansion coefficients within an in-plane direction. A semiconductor laser element (the semiconductor element) is provided with the semiconductor element section, which includes a direction of [1-100] and a direction of [0001] having different thermal expansion coefficients within the in-plane direction of a main surface, and a sub-mount, which includes an arrow (E) direction and an arrow (F) direction having different thermal expansion coefficients within the in-plane direction of the main surface. The semiconductor element section is bonded on the sub-mount so that the direction [1-100] of the semiconductor element section is close to the side of the arrow (E) direction than the arrow (F) direction of the sub-mount.
1 . A semiconductor element comprising:
a semiconductor element section having a first surface and including a plurality of directions having different thermal expansion coefficients in the in-plane directions of said first surface; and
a base having a second surface and including a plurality of directions having different thermal expansion coefficients in the in-plane directions of said second surface, with said first surface of said semiconductor element section bonded to said second surface, wherein
said semiconductor element section is so bonded to said base that the direction having the largest thermal expansion coefficient in the first surface of said semiconductor element section is closer to the side of the direction having the largest thermal expansion coefficient than the direction having the smallest thermal expansion coefficient in the second surface of said base.
2 . The semiconductor element according to claim 1 , wherein
the direction having the largest thermal expansion coefficient in the in-plane directions of the first surface of said semiconductor element section substantially coincides with the direction having the largest thermal expansion coefficient in the in-plane directions of the second surface of said base.
3 . The semiconductor element according to claim 1 , wherein
when the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the in-plane directions of the first surface of said semiconductor element section are α EL and α ES respectively, and
the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the in-plane directions of the second surface of said base are α SL and α SS respectively,
at least one relation of α SL ≧α EL >α SS or α SL >α ES ≧α SS or α EL ≧ SL >α ES or α EL >α SS ≧α ES holds between the thermal expansion coefficients in the respective directions of said base and said semiconductor element section.
4 . The semiconductor element according to claim 1 , wherein
when the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the in-plane directions of the first surface of said semiconductor element section are α EL and α ES respectively, and
the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the in-plane directions of the second surface of said base are α SL and α SS respectively,
the relation of α SL >α SS ≧α EL >α ES or α EL >α ES ≧α sL >α SS holds between the thermal expansion coefficients in the respective directions of said base and said semiconductor element section.
5 . The semiconductor element according to claim 1 , wherein
when the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the first surface of said semiconductor element section are α EL and α ES respectively, and
the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the second surface of said base are α SL and α SS respectively,
the first surface of said semiconductor element section is rectangularly formed so that the thermal expansion coefficient in the direction along the long side is α ES if |α SL −α EL >|α SS −α ES |, and
the first surface of said semiconductor element section is rectangularly formed so that the thermal expansion coefficient in the direction along the long side is α EL if |α SL −α EL |<|α SS −α ES |.
6 . The semiconductor element according to claim 1 , wherein
the appearance of said semiconductor element section is so formed that the direction having the largest thermal expansion coefficient in the in-plane directions of the first surface of said semiconductor element section and the direction having the smallest thermal expansion coefficient in the in-plane directions of the first surface of said semiconductor element section can be distinguished from each other.
7 . The semiconductor element according to claim 1 , wherein
the shape of said first surface of said semiconductor element section is substantially rectangularly formed.
8 . The semiconductor element according to claim 1 , wherein
the appearance of said semiconductor element section is so formed that the direction having the largest thermal expansion coefficient in the in-plane directions of the second surface of said base and the direction having the smallest thermal expansion coefficient in the in-plane directions of the second surface of said base can be distinguished from each other.
9 . The semiconductor element according to claim 1 , wherein
said semiconductor element section includes a semiconductor layer having said first surface and having a hexagonal structure or a wurtzite structure, and
said first surface is substantially a (H, K, −H−K, 0) plane, where at least either one of H and K is a nonzero integer.
10 . The semiconductor element according to claim 1 , further comprising a bonding layer for bonding the second surface of said base and the first surface of said semiconductor element section to each other.
11 . The semiconductor element according to claim 10 , wherein
said base and said bonding layer are both electrically conductive.
12 . The semiconductor element according to claim 10 , wherein
said bonding layer is provided on a region separated from a cavity facet of said semiconductor element section at a prescribed distance in the extensional direction of a cavity.
13 . The semiconductor element according to claim 1 , so formed that the Young's modulus of said base is smaller than the Young's modulus of said semiconductor element section.
14 . The semiconductor element according to claim 1 , wherein
said semiconductor element section is a semiconductor light-emitting element section including an emission layer.
15 . The semiconductor element according to claim 1 , wherein
said base is a submount.
16 . A method for manufacturing a semiconductor element, comprising steps of:
forming a semiconductor element section having a first surface and including a plurality of directions having different thermal expansion coefficients in the in-plane directions of said first surface;
bonding said first surface of said semiconductor element section to a second surface of a base having said second surface and including a plurality of directions having different thermal expansion coefficients in the in-plane directions of said second surface so that the direction having the largest thermal expansion coefficient in said first surface is closer to the side of the direction having the largest thermal expansion coefficient than the direction having the smallest thermal expansion coefficient in said second surface.
17 . The method for manufacturing a semiconductor element according to claim 16 , wherein
the step of forming said semiconductor element section includes a step of growing said semiconductor element section including the plurality of directions having the different thermal expansion coefficients in the in-plane directions of said first surface on the surface of a growth substrate including a plurality of directions having different thermal expansion coefficients in the in-plane directions.
18 . The method for manufacturing a semiconductor element according to claim 16 , wherein
the step of bonding said first surface of said semiconductor element section to said second surface of said base includes a step of bonding a side of said semiconductor element section formed on a growth substrate in the step of forming said semiconductor element section to said base to be opposed thereto,
the method further comprises a step of removing said growth substrate after the step of bonding said first surface of said semiconductor element section to said second surface of said base, and
said base is a support substrate.
19 . The method for manufacturing a semiconductor element according to claim 16 , wherein
when the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the first surface of said semiconductor element section are α EL and α ES respectively, and
the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the second surface of said base are α SL and α SS respectively,
the step of forming said semiconductor element section having said first surface includes a step of:
rectangularly forming the first surface of said semiconductor element section so that the thermal expansion coefficient in the direction along the long side is α ES if |α SL −α EL |>|α SS −α ES |, and
rectangularly forming the first surface of said semiconductor element section so that the thermal expansion coefficient in the direction along the long side is α EL if |α EL −α EL <|α SS −α ES |.
20 . The method for manufacturing a semiconductor element according to claim 16 , wherein
when the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the first surface of said semiconductor element section are α EL and α ES respectively, and
the largest thermal expansion coefficient and the smallest thermal expansion coefficient in the second surface of said base are α SL and α SS respectively,
the step of bonding the first surface of said semiconductor element section to said second surface of said base includes a step of bonding the surfaces to each other while coinciding the in-plane directions of the second surface of said base and the in-plane directions of the first surface of said semiconductor element section with each other so that at least one relation of α SL ≧α EL >α SS or α SL >α ES ≧α SS or α EL ≧α SL >α ES or α EL >α SS ≧α ES holds between the thermal expansion coefficients in the respective directions of said base and said semiconductor element section.