IP Library Granted Patent US 8,117,383
Granted Patent B2
US 8,117,383 · App. 12/161,519 · Granted Feb 14, 2012

Hardware accelerator based method and device for string searching

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Quick Facts
Patent No.
US 8,117,383
App. No.
12/161,519
Granted
Feb 14, 2012
Kind
B2
Abstract

A method for searching within a data block for a data chunk having a predefined value, the method includes: fetching, by a processor, a data block search instruction; fetching, a data unit that includes multiple data chunks; wherein at least one data chunk within the data unit belongs to the data block; deciding whether to use a mask for data chunk level masking; searching, by a hardware accelerator, for a valid data chunk within the fetched data unit that has the predefined value; wherein the searching comprising applying a mask; wherein a valid data chunk in an non-masked data chunk that belongs to the data block; and determining whether to update the value of the mask and whether to fetch a new data unit that belongs to the data block.

Claims (32)

1. A method for searching within a data block for a data chunk having a predefined value, the method comprises:

fetching, by a processor, a data block search instruction;

fetching a data unit that comprises multiple data chunks, wherein at least one data chunk within the data unit belongs to the data block;

deciding whether to use a mask for data chunk level masking or for bit level masking;

searching, by a hardware accelerator, for a valid data chunk within the fetched data unit that has the predefined value, wherein the searching comprising applying a mask; wherein a valid data chunk is a non-masked data chunk that belongs to the data block; and

determining whether to update the value of the mask and whether to fetch a new data unit that belongs to the data block.

2. The method according to claim 1 wherein the searching comprises duplicating a mask portion, the mask portion having a size determined based on a size of the data chunk, such as to provide a mask, if the mask is utilized for bit level masking.

3. The method according to claim 2 wherein the fetching, by a processor, comprises fetching an instruction that comprises a data unit size value.

4. The method according to claim 2 wherein the fetching, by a processor, comprises fetching an instruction that comprises a data unit size location field.

5. The method according to claim 2 further comprising updating the mask if the mask is utilized for data chunk level masking.

6. The method according to claim 5 wherein a size of the mask is determined based on a size of the data chunk.

7. The method according to claim 5 wherein the updating comprises rotating the mask by a data chunk size.

8. The method according to claim 2 wherein the searching comprises performing in parallel multiple match operations between multiple data chunks that belong to the data unit and multiple reference data chunks.

9. The method according to claim 1 wherein the searching comprises performing in parallel multiple match operations between multiple data chunks that belong to the data unit and multiple reference data chunks.

10. The method according to claim 1 wherein the searching comprises duplicating a mask portion, the mask portion having a size determined based on a size of the data chunk, such as to provide a mask, if the mask is utilized for bit level masking.

11. The method according to claim 1 wherein the fetching, by a processor, comprises fetching an instruction that comprises a data unit size value.

12. The method according to claim 1 wherein the fetching, by a processor, comprises fetching an instruction that comprises a data unit size location field.

13. A device for locating a predefined value data chunk within a data block, the device comprises:

a memory unit adapted to store data units and a processor adapted to fetch an instruction and selectively generate control signals in response to the fetched instruction; and

a hardware accelerator, coupled to the memory unit, wherein the hardware accelerator is adapted to:

(i) receive control signals from the processor,

(ii) fetch a data unit that comprises multiple data chunks, wherein at least one data chunk within the data unit belongs to the data block,

(iii) decide whether to use a mask for data chunk level masking or for bit level masking;

(iv) search for a valid data chunk within the fetched data unit that has the predefined value, wherein the searching comprising applying a mask, wherein a valid data chunk is a non-masked data chunk that belongs to the data block; and

(v) determine whether to update the value of the mask and whether to fetch a new data unit that belongs to the data block.

14. The device according to claim 13 wherein the hardware accelerator is adapted to duplicate a mask portion having a size that is responsive to a size of the data chunk, such as to provide a mask, if the mask is utilized for bit level masking.

15. The device according to claim 14 wherein the processor is adapted to fetch an instruction that comprises a data unit size value.

16. The device according to claim 14 wherein the processor is adapted to fetch an instruction that comprises a data unit size location field.

17. The device according to claim 14 wherein the hardware accelerator is adapted to update the mask if the mask is utilized for data chunk level masking.

18. The device according to claim 14 wherein the hardware accelerator is adapted to update the mask in response to a size of the data chunk.

19. The device according to claim 14 wherein the hardware accelerator is adapted to rotate the mask by a data chunk size.

20. The device according to claim 14 wherein the hardware accelerator is adapted to perform in parallel multiple match operations between multiple data chunks that belong to the data unit and multiple reference data chunks.

Assignments (29)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
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