IP Library Granted Patent US 7,968,989
Granted Patent B2
US 7,968,989 · App. 12/163,914 · Granted Jun 28, 2011

Multi-package slot array

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Quick Facts
Patent No.
US 7,968,989
App. No.
12/163,914
Granted
Jun 28, 2011
Kind
B2
Abstract

A multi-package module that includes a multi-layer interconnect structure, a housing structure attached to the multi-layer interconnect structure, and a plurality of integrated circuit packages inserted into slots in the housing structure, and placed into contact with the multi-layer interconnect structure. The integrated circuit packages can be removed from the slots in the housing structure, thereby enabling testing and/or replacement of the integrated circuit packages.

Claims (13)

1. A multi-package module comprising:

an interconnect structure having a plurality of interconnect terminals located over a first surface thereof;

a housing structure attached to the interconnect structure, the housing structure having plurality of slots through which the interconnect terminals are exposed;

a plurality of integrated circuit packages, each having a first set of contact terminals located along a first surface thereof, wherein each of the integrated circuit packages is positioned within a corresponding one of the slots of the housing structure, such that the first set of contact terminals of each integrated circuit package are in contact with a corresponding set of the interconnect terminals of the interconnect structure, and wherein the first surface of each of the integrated circuit packages is perpendicular to the first surface of the interconnect structure; and

a fan module located in a slot of the housing structure, wherein the fan module includes a fan that directs an airflow over the integrated circuit modules.

2. The multi-package module of claim 1 , wherein the slot containing the fan module is positioned orthogonal to the slots containing the integrated circuit packages.

3. The multi-package module of claim 1 , wherein the slot containing the fan module is positioned parallel to the slots containing the integrated circuit packages.

4. A multi-package module comprising:

an interconnect structure having a plurality of interconnect terminals exposed at an upper surface thereof;

a housing structure having a lower surface and an opposing upper surface, wherein the lower surface of the housing structure is attached to the upper surface of the interconnect structure, the housing structure having a plurality of slots through which the interconnect terminals are exposed, wherein each of the slots extends from the lower surface to the opposing upper surface of the housing structure;

a plurality of integrated circuit packages, each having a first set of contact terminals located along a first surface thereof, wherein each of the integrated circuit packages is positioned within a corresponding one of the slots of the housing structure, such that the first set of contact terminals of each integrated circuit package are in contact with a corresponding set of the interconnect terminals of the interconnect structure, and wherein the first surface of each of the integrated circuit packages is perpendicular to the upper surface of the interconnect structure;

a lid removably attached to the housing structure, wherein the lid extends over the slots in the housing structure, thereby retaining the integrated circuit packages in the slots; and

spring-loaded elements located between the lid and the integrated circuit packages, wherein the spring-loaded elements force the integrated circuit packages into the slots.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2008
From: KOKOZAKI, CAMILLE; SHAH, JITESH
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 021166/0115 →