Flip chip overmold package
View Patent ↗An integrated circuit (IC) package having a packaging substrate, an IC disposed onto the packaging substrate, and a rigid support member attached to the substrate layer through an adhesive spacer is provided. The packaging substrate includes multiple decoupling capacitors positioned thereon around the IC. A heat sink is placed over the IC. The rigid support member provides enhanced structural support for the IC packaging and there is ample space between a bottom surface of the rigid support member and the packaging substrate to allow the placement of the decoupling capacitors underneath the rigid support member.
1. An integrated circuit package, comprising:
an integrated circuit (IC);
a packaging substrate onto which the IC is disposed, the packaging substrate having a plurality of decoupling capacitors disposed on a planar top surface of the packaging substrate;
a support member surrounding a peripheral edge of the IC, the support member affixed to the planar top surface of the packaging substrate through an adhesive spacer, the adhesive spacer being configured to enable the plurality of decoupling capacitors to be disposed under and spaced apart from a bottom surface of the support member, the adhesive spacer disposed on the planar top surface of the packaging substrate and extending therefrom, the support member composed of a conductive material and the support member forming a cavity through a center region of the support member, the cavity sized such that the IC fits therethrough; and
molding compound injected into the integrated circuit package, the molding compound filling areas around the IC and below and above the support member, wherein edges of the cavity of the support member are spaced far apart from edges of the IC for reaching below the bottom surface of the support member and further contacting the entire planar top surface of the support member.
2. The IC package of claim 1 , wherein the support member is composed of copper and the adhesive spacer is a stencil printable adhesive material.
3. The IC package of claim 1 , further comprising:
a thermal interface material (TIM) disposed onto a top surface of the IC; and
a heat sink disposed over the TIM.
4. The IC package of claim 3 , wherein a center portion of a bottom surface of the heat sink extends outward toward a top surface of the TIM, and wherein the center portion of the heat sink is thicker than a peripheral region of the heat sink.
5. The IC package of claim 3 , wherein a bottom surface of the heat sink is spaced apart from a top surface of the support member.
6. The IC package of claim 5 , wherein an outer peripheral bottom surface of the heat sink is disposed on top of molding compound and wherein the molding compound is disposed over a top surface of the support member.
7. The IC package of claim 4 , wherein an inner center region of the bottom surface of the heat sink extends outward past the outer peripheral bottom surface of the heat sink and wherein a surface of the inner center region contacts the TIM.
8. The IC package of claim 1 , wherein the support member is rigid and is composed of copper, and wherein the adhesive spacer is disposed on corners of a surface of the packaging substrate.
9. The IC package of claim 1 , wherein the integrated circuit is a programmable logic device.
10. The IC package of claim 9 , wherein the support member is a planar support member having a thickness that is less than a thickness of the IC.
11. The IC package of claim 1 , wherein the planar top surface of the package substrate extends over an entire surface of a core of the package substrate.
12. An integrated circuit package, comprising:
an integrated circuit (IC);
a packaging substrate onto which the IC is disposed, the packaging substrate having a plurality of decoupling capacitors disposed on a planar top surface of the packaging substrate;
a support member surrounding a peripheral edge of the IC, the support member affixed to the top surface of the packaging substrate through an adhesive spacer, wherein the plurality of decoupling capacitors is disposed under and spaced apart from a surface of the support member, the adhesive spacer disposed on the planar top surface of the packaging substrate and extending therefrom, the adhesive spacer having a height greater than a height of each decoupling capacitor of the plurality of decoupling capacitors, the support member comprising a conductive material and the support member forming a cavity through a center region of the support member, the cavity sized such that the IC fits therethrough; and
molding compound filling areas around the IC and surrounding the plurality of decoupling capacitors below the support member, wherein edges of the cavity of the support member are spaced far apart from edges of the IC for reaching below the bottom surface of the support member and further contacting the entire planar top surface of the support member.
13. The IC package of claim 12 , wherein the support member comprises copper.
14. The IC package of claim 12 further comprising:
a thermal interface material (TIM) disposed onto a top surface of the IC; and
a heat sink disposed over the TIM.
15. The IC package of claim 12 , wherein a center portion of a bottom surface of the heat sink extends outward toward a top surface of the TIM, the center portion of the heat sink being thicker than a peripheral region of the heat sink.
16. The IC package of claim 12 , wherein the integrated circuit is a programmable logic device.
17. The IC package of claim 12 , wherein the support member is a planar support member having a thickness that is less than a thickness of the IC.