IP Library Granted Patent US 8,229,352
Granted Patent B2
US 8,229,352 · App. 12/167,195 · Granted Jul 24, 2012

Wireless architecture for 60GHZ

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Quick Facts
Patent No.
US 8,229,352
App. No.
12/167,195
Granted
Jul 24, 2012
Kind
B2
Abstract

A device has an RF mixer, an IF mixer module, a single synthesizer, a frequency divider, a single side band mixer and a frequency quadrupler. The single synthesizer generates a signal to the IF mixer module, the frequency divider, and the single side band mixer. The single side band mixer mixes signals from the single synthesizer and the frequency divider. The frequency quadrupler receives the output of the single side band mixer. The RF mixer is coupled to the frequency quadrupler and the IF mixer module.

Claims (63)

1. A device comprising:

a single synthesizer;

a frequency divider coupled to the single synthesizer;

a mixer coupled to the single synthesizer and to the frequency divider;

a frequency quadrupler coupled to the mixer; and

a radio frequency (RF) mixer coupled to the frequency quadrupler.

2. The device of claim 1 further comprising:

an IF mixer module coupled to the single synthesizer.

3. The device of claim 2 wherein the IF mixer module comprises an IF mixer and an IF module.

4. The device of claim 2 wherein the IF mixer module comprises an IF filter.

5. The device of claim 2 further comprising:

a processor configured to generate baseband signals;

a digital-to-analog converter (DAC) coupled to the processor to convert the baseband signals to analog signals; and

an analog front end coupled to the DAC to filter and amplify the analog signals, the IF mixer module to receive an output of the analog front end.

6. The device of claim 5 further comprising:

a multiplexer coupled to the RF mixer; and

a plurality of phase shifters coupled to the multiplexer, the multiplexer to control which phase shifter is to receive a signal.

7. The device of claim 6 further comprising:

a plurality of power amplifiers coupled to the plurality of phase shifters; and

a plurality of antennas coupled to the plurality of power amplifiers.

8. The device of claim 6 further comprising:

a control channel to couple the processor to the plurality of phase shifters, the processor to control via the control channel the phase and magnitude of currents in each of the antennas to produce a desired beam pattern.

9. The device of claim 2 further comprising:

an analog front end to receive an output of the IF mixer module to convert an IF signal to a baseband frequency signal;

an analog-to-digital converter (ADC) coupled to the analog front end to convert the baseband frequency signal to a digital signal; and

a processor coupled to the ADC to restore an amplitude and a phase of the digital signal.

10. The device of claim 9 further comprising:

a RF combiner coupled to the RF mixer, the RF mixer configured to generate a fixed IF frequency from multiple frequencies received from the RF combiner; and

a plurality of phase shifters coupled to the RF combiner, the RF combiner to form a single line feed output.

11. The device of claim 10 further comprising:

a plurality of amplifiers coupled to the plurality of phase shifters; and

a plurality of antennas coupled to the plurality of amplifiers.

12. The device of claim 10 further comprising:

a control channel to couple the processor to the plurality of phase shifters, the processor to control via the control channel the phase and magnitude of currents in each of the antennas to receive a desired beam pattern.

13. The device of claim 1 wherein the RF mixer is operable to generate frequency outputs of 58.32 GHz, 60.48 GHZ, 62.64 GHz, and 64.8 GHz with a fixed intermediate frequency.

14. The device of claim 1 wherein the single synthesizer operates at a frequency of about 12.96 GHz.

15. The device of claim 14 wherein the frequency divider is configured to divide by 8, 12, or 24.

16. The device of claim 1 wherein the frequency divider has a divider ratio that is a multiple of two.

17. The device of claim 1 wherein the frequency quadrupler comprises two frequency doublers.

18. The device of claim 1 wherein the mixer includes a single side band mixer.

19. A device comprising:

a processor;

a radio frequency (RF) transmitter coupled to and controlled by the processor to generate frequency outputs at 58.32 GHz, 60.48 GHZ, 62.64 GHz, and 64.8 GHz, wherein the RF transmitter further comprises

an IF mixer module,

a single synthesizer coupled to the IF mixer module,

a frequency divider coupled to the single synthesizer,

a single side band mixer coupled to the single synthesizer and to the frequency divider, and

a frequency quadrupler coupled to an RF mixer, the RF mixer coupled to the IF mixer module.

20. The device of claim 19 wherein the single synthesizer operates at a frequency of about 12.96 GHz.

21. The device of claim 20 wherein the frequency divider is configured to divide by 8, 12, or 24.

22. The device of claim 19 wherein the RF mixer is configured to generate multiple RF frequencies with a fixed intermediate frequency.

23. The device of claim 19 wherein the RF mixer is configured to generate a fixed intermediate frequency with multiple RF frequencies.

24. The device of claim 19 wherein the device is used for a wireless video area network (WVAN).

25. The device of claim 19 wherein the device is used for a wireless personal area network (WPAN).

26. The device of claim 19 wherein the device is used for a wireless local area network (WLAN).

27. A device comprising:

a single synthesizer;

a frequency divider coupled to the single synthesizer;

a mixer coupled to the single synthesizer and to the frequency divider;

a frequency multiplier coupled to the mixer; and

a radio frequency (RF) mixer coupled to the frequency multiplier.

28. The device of claim 27 wherein the frequency multiplier comprises a quadrupler.

29. The device of claim 27 wherein the frequency multiplier comprises a doubler.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2017
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.
To: QUALCOMM INCORPORATED
Reel/Frame 041905/0814 →
RELEASE OF SECURITY INTEREST Recorded Mar 7, 2017
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 041905/0860 →
SECURITY INTEREST Recorded Mar 19, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035226/0289 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2008
From: DOAN, CHINH; EMAMI, SOHRAB
To: SIBEAM, INC.
Reel/Frame 021686/0701 →