IP Library › Granted Patent US 8,156,277
Granted Patent B2
US 8,156,277 · App. 12/168,269 · Granted Apr 10, 2012

Flash memory module and storage system

Assignee: Hitachi, Ltd
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Quick Facts
Patent No.
US 8,156,277
App. No.
12/168,269
Granted
Apr 10, 2012
Kind
B2
Abstract

A storage controller manages address conversion information denoting the correspondence relationship between a logical address and a physical address of storage area (for example, a physical block) inside a flash memory. The storage controller uses the above-mentioned address conversion information to specify a physical address corresponding to a logical address specified by an I/O request from a higher-level device, and sends an I/O command including I/O-destination information based on the specified physical address to a memory controller inside a flash memory module. The memory controller carries out the I/O with respect to a storage area inside a flash memory specified from the I/O-destination information of the I/O command from the storage controller.

Claims (53)

1. A flash memory module comprising:

a flash memory comprising a plurality of physical blocks configured with a plurality of physical pages; and

a memory controller that controls an I/O (input/output) with respect to the flash memory,

the memory controller comprising:

a command creation unit; and

a command interpreter that interprets a command, including a data reclamation command having at least one of a write command, a read command and a delete command for performing a deletion of data as identified by a physical address, received by the command creation unit from a storage controller coupled to the flash memory module, said storage controller having address conversion information which shows correspondence between a logical address and a physical address being operative to create physical address information based on the address conversion information;

wherein the command creation unit, when a command interpreted by the command interpreter is a data reclamation command which collects a plurality of valid physical pages distributed among two or more of the plurality of physical blocks corresponding to a logical block into one physical block, uses a physical address information included in the data reclamation command to create a read command and/or write command and/or delete command related to data reclamation, and sends the created read command and/or write command and/or delete command to the flash memory.

2. The flash memory module according to claim 1 ,

the data reclamation command includes the following physical address information (19-A) to (19-C):

(19-A) a page list that is a plurality of page information elements denoting a plurality of read-source physical pages in which are respectively stored a plurality of data elements that configure a data element group corresponding to the first logical block;

(19-B) deletion block information denoting a deletion block, which is a physical block from which a data element group is to be deleted; and

(19-C) write-destination block information denoting the deletion block, which constitutes a write destination of the data element group,

the memory controller further comprises a first buffer, and

the memory controller executes the following (19-1) to (19-4):

(19-1) creating, by the command creation unit, a plurality of read commands in page units for reading out a plurality of data elements from the plurality of read-source physical pages specified from the page list, and sending the plurality of read commands to the flash memory;

(19-2) storing, by the first buffer, the plurality of data elements read out in response to the plurality of read commands in page units;

(19-3) sending, by the command creation unit, to the flash memory a delete command for deleting a data element group inside the deletion block specified from the deletion block information; and

(19-4) sending, by the command creation unit, to the flash memory a plurality of write commands in page units for writing a plurality of data elements stored in the first buffer to a plurality of physical pages inside the deletion block specified from the write-destination block information.

3. The flash memory module according to claim 2 ,

wherein the data reclamation command further includes a read command that has the information of the (19-A); a delete command that has the information of the (19-B); and a write command that has the information of the (19-C), and

the command creation unit executes the (19-1) in response to the read command of the data reclamation command, executes the (19-3) in response to the delete command of the data reclamation command, and executes the (19-4) in response to the write command of the data reclamation command.

4. The flash memory module according to claim 2 ,

wherein a flash memory comprises a plurality of flash memory chips, and when a data element stored in a physical page inside a first physical block is to be updated to an update data element, the update data element is written to a physical page inside a second physical block, which is a deleted physical block allocated to the first physical block;

each flash memory chip comprises a plurality of physical blocks;

a plurality of the first physical blocks are allocated to the second physical block;

each of page information elements that configure the page list includes information denoting a read-source physical page, and information denoting the physical block that has the read-source physical page; and

information denoting a physical block that has a read-source physical page, the deletion block information, and the write-destination block information respectively includes information denoting the flash memory chip that comprises the physical block.

5. The flash memory module according to claim 2 ,

wherein the flash memory comprises a plurality of flash memory chips,

each flash memory chip comprises a plurality of physical blocks, and

a physical block that comprises, the plurality of read-source physical pages, and the deletion block exist in different flash memory chips.

6. The flash memory module according to claim 2 ,

wherein, when a data element stored in a physical page inside a first physical block is updated to an update data element, the update data element is written to a physical page inside a second physical block, which is a deleted physical block allocated to the first physical block,

a plurality of the first physical blocks are allocated to the second physical block, and

a storage capacity of the first buffer is a storage capacity of the plurality of first physical blocks.

7. The flash memory module according to claim 1 ,

the memory controller comprises a second buffer;

the data reclamation command is a first data reclamation command that includes the following (24-A) and (24-B):

(24-A) a page list, which is a plurality of page information elements denoting a plurality of read-source physical pages in which are respectively stored a plurality of data elements that configure a data element group corresponding to the first logical block, and which is created using the address conversion information; and

(24-B) information denoting a second memory controller of the second flash memory module, and

the memory controller, when a command interpreted by the command interpreter is the first data reclamation command, executes the following (24-1) to (24-3):

(24-1) sending, by the command creation unit, to the flash memory a plurality of read commands in page units for reading out a plurality data elements from the plurality of read-source physical pages specified from the information of the (24-A);

(24-2) storing, by the second buffer, the plurality of data elements read out in response to the plurality of read commands in page units; and

(24-3) transferring, by the command creation unit, a plurality of data elements stored in the second buffer to another memory controller specified from the information of the (24-B).

8. The flash memory module according to claim 1 ,

the memory controller comprises a second buffer;

the data reclamation command is a second data reclamation command including the following (25-A) and (25-B):

(25-A) deletion block information denoting the deletion block, which is a physical block from which a data element group is to be deleted; and

(25-B) write-destination block information denoting the deletion block, which constitutes a write destination of the data element group, and

the memory controller executes the following (25-1) to (25-3):

(25-1) writing, by the command creation unit, a plurality of data element groups transferred from a different memory controller to the second buffer;

(25-2) sending, by the command creation unit, to the flash memory a delete command for deleting a data element group inside the deletion block specified from the information of the (25-A); and

(25-3) sending, by the command creation unit, to the flash memory a plurality of write commands in page units for respectively writing a plurality of data elements stored in the second buffer to a plurality of physical pages inside the deletion block specified from the information of the (25-B).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2008
From: KITAHARA, JUN
To: HITACHI, LTD.
Reel/Frame 021198/0912 →
Priority Claims (1)
JP 2008-133098 · May 21, 2008 · national
Continuity (1)
Related Publication 20090292862A1 · Nov 26, 2009