IP Library Granted Patent US 7,649,368
Granted Patent B2
US 7,649,368 · App. 12/169,538 · Granted Jan 19, 2010

Wafer level interposer

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Quick Facts
Patent No.
US 7,649,368
App. No.
12/169,538
Granted
Jan 19, 2010
Kind
B2
Abstract

Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.

Claims (30)

1. A method of testing an electronic device, said method comprising:

obtaining a contactor comprising a first plurality of terminals and a support structure;

obtaining an interposer comprising a substrate, a first plurality of elongate, resilient contact elements extending from a first side of said substrate, and a second plurality of contact elements corresponding to a second side of said substrate, ones of said first plurality of contact elements being electrically connected to ones of said second plurality of contact elements;

supporting said interposer with said support structure so that said first plurality of contact elements do not contact said first terminals on said contactor;

bringing said interposer into contact with said electronic device; and

applying sufficient pressure between said interposer and said electronic device so that said interposer is not supported by said support structure, said first plurality of contact elements contact said first terminals on said contactor, and said first plurality of contact elements and said second plurality of contact elements provide electrical connections from said first terminals on said contactor to a second plurality of terminals on said electronic device.

2. The method of claim 1 , further comprising applying power to said electronic device through said electrical connections.

3. The method of claim 2 , further comprising communicating electronic signals through said electrical connections to test said electronic device.

4. The method of claim 1 , further comprising communicating electronic signals between said electronic device and an electronic device disposed on said contactor.

5. The method of claim 1 , further comprising electrically interfacing said contactor to a host controller.

6. The method of claim 1 , wherein said electronic device comprises a semiconductor device.

7. The method of claim 6 , wherein said electronic device comprises an unsingulated wafer.

8. The method of claim 1 , wherein said applying sufficient pressure comprises:

compressing said first plurality of contact elements; and

pressing ones of said second plurality of terminals on said electronic device against ones of said second plurality of contact elements.

9. The method of claim 1 , further comprising limiting compression of said first plurality of contact elements by bringing a stop structure disposed on said first surface of said interposer into contact with said contactor.

10. The method of claim 1 , further comprising limiting compression of said second plurality of contact structures by bringing a stop structure disposed on said second surface of said interposer into contact with said electronic device.

11. The method of claim 1 , further comprising positioning said electronic device on a base, wherein said bringing said interposer into contact with said electronic device comprises moving said base toward said interposer.

12. The method of claim 1 , wherein said bringing said interposer into contact with said electronic device comprises moving one of said interposer and said contactor toward said electronic device.

13. The method of claim 1 , wherein said applying sufficient pressure comprises moving said interposer from a first position to a second position.

14. The method of claim 1 , wherein said applying sufficient pressure comprises applying forces to ones of said second plurality of contact elements.

15. The method of claim 1 , further comprising releasing pressure between said interposer and said electronic device so that said interposer is again supported by said support structure, and said first plurality of contact elements do not contact said first terminals on said contactor.

16. A method of testing an electronic device, said method comprising:

obtaining a contactor comprising a first plurality of terminals and a support structure;

obtaining an interposer comprising a substrate, a first plurality of elongate, resilient contact elements extending from a first side of said substrate, and a second plurality of contact elements corresponding to a second side of said substrate, ones of said first plurality of contact elements being electrically connected to ones of said second plurality of contact elements;

moving said interposer and said electronic device together to move the interposer from a first position to a second position, wherein in the first position said interposer is supported by said support structure so that said first plurality of contact elements do not contact said first terminals on said contactor, and wherein in the second position said interposer is not supported by said support structure and said first plurality of contact elements contact said first terminals on said contactor.

17. The method of claim 16 , wherein in said second position said first plurality of contact elements and said second plurality of contact elements provide electrical connections from said first terminals on said contactor to a second plurality of terminals on said electronic device.

18. The method of claim 16 , further comprising applying power to said electronic device through said electrical connections.

19. The method of claim 18 , further comprising communicating electronic signals through said electrical connections to test said electronic device.

20. The method of claim 16 , further comprising communicating electronic signals between said electronic device and an electronic device disposed on said contactor.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →