Fabrication method of semiconductor integrated circuit device
View Patent ↗A technique capable of stably releasing chips from a dicing tape, includes grinding a back surface of a semiconductor wafer, while adhering a pressure sensitive adhesive tape to a circuit forming surface of the semiconductor wafer formed with an integrated circuit, to achieve a predetermined thickness and forcibly oxidizing the back surface of the semiconductor wafer. Then, the pressure sensitive adhesive tape adhered to the circuit forming surface of the semiconductor wafer is released, and a dicing tape is adhered to the back surface of the semiconductor wafer. Further, the semiconductor wafer is divided by dicing it into individual chips, and then the back surface of the chip is pressed by way of the dicing tape, thereby releasing the chips from the dicing tape.
1. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) providing a semiconductor wafer having a first main surface and a second main surface which is opposite to said first main surface, said semiconductor wafer having a circuit pattern formed over said first main surface and a first thickness;
(b) grinding said second main surface of said semiconductor wafer, thereby making said semiconductor wafer have a second thickness, which is thinner than said first thickness;
(c) after the step (b), etching said second main surface of said semiconductor wafer to relieve stress of said second main surface of said semiconductor wafer caused by said grinding,
(d) after the step (c), forcibly forming an oxidation film on said second main surface of said semiconductor wafer, so as to form a forcibly formed oxidation film;
(e) after the step (d), adhering a dicing tape over said second main surface of said semiconductor wafer such that said dicing tape contacts with said forcibly formed oxidation film;
(f) after the step (e), dicing said semiconductor wafer, thereby dividing said semiconductor wafer into individual chips; and
(g) after the step (f), removing said individual chips from said dicing tape.
2. A fabrication method of a semiconductor integrated circuit device according to claim 1 , wherein said etching for stress-relief is performed by a spin-etching method.
3. A fabrication method of a semiconductor integrated circuit device according to claim 1 , wherein the diameter of semiconductor wafer is about 300 mm.
4. A fabrication method of a semiconductor integrated circuit device according to claim 1 , wherein the first thickness of the semiconductor wafer is 700 μm or more.
5. A fabrication method of a semiconductor integrated circuit device according to claim 4 , wherein the second thickness of the semiconductor wafer is less than 60 μm.