IP Library Granted Patent US 7,892,933
Granted Patent B2
US 7,892,933 · App. 12/171,676 · Granted Feb 22, 2011

Semiconductor device and method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,892,933
App. No.
12/171,676
Granted
Feb 22, 2011
Kind
B2
Abstract

According to an aspect of an embodiment, a semiconductor device has a semiconductor substrate, a gate insulating film on the semiconductor substrate, a gate electrode formed on the gate insulating film, an impurity diffusion region formed in an area of the semiconductor substrate adjacent to the gate electrode to a first depth to the semiconductor substrate, the impurity diffusion region containing impurity, an inert substance containing region formed in the area of the semiconductor substrate to a second depth deeper than the first depth, the inert substance containing region containing an inert substance, and a diffusion suppressing region formed in the area of the semiconductor substrate to a third depth deeper than the second depth, the diffusion suppressing region containing a diffusion suppressing substance suppressing diffusion of the impurity.

Claims (11)

1. A method of manufacturing a semiconductor device comprising:

forming a gate electrode over a gate insulating film disposed over a semiconductor substrate;

forming an amorphous region in an area of the semiconductor substrate adjacent to the gate electrode to a first depth;

forming a diffusion suppressing region in the area of the semiconductor substrate to a second depth deeper than the first depth, the diffusion suppressing region containing a diffusion suppressing substance suppressing diffusion of a impurity;

forming an impurity diffusion region in the area of the semiconductor substrate to a third depth shallower than the first depth, the impurity diffusion region containing the impurity; and

annealing the semiconductor substrate.

2. The method according to claim 1 , wherein the amorphous region is formed by doping the inert substance.

3. The method according to claim 2 , wherein the semiconductor substrate comprises a body of single crystal silicon and the inert substance is a substance heavier than silicon.

4. The method according to claim 3 , wherein the inert substance is germanium.

5. The method according to claim 1 , wherein the diffusion suppressing substance is carbon.

6. The method according to claim 1 , wherein the impurity is at least one of phosphorous, arsenic, boron, boron fluoride and cluster boron.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2008
From: OKABE, KENICHI
To: FUJITSU LIMITED
Reel/Frame 021329/0422 →