IP Library Patent Application 12181828
Patent Application
App. No. 12/181,828

GUI-FACILITATED SIMULATION AND VERIFICATION FOR VEHICLE ELECTRICAL/ELECTRONIC ARCHITECTURE DESIGN

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Patent No.
US None
App. No.
12/181,828
Abstract

Disclosed herein are computer aided design (CAD) techniques to implement a unified data schema and graphical user interface (GUI) to link ECU/devices, in-vehicle communications, and vehicle harness information together with respect to architectural relation, performance relation, and cost relation, and to facilitate a designer's understanding and manipulation of this information. The domain-specific information from each domain is converted to objects in this unified data schema and stored in a unified database that is accessible to every domain, so that the impact of the current state in the device domain can be accessed and analyzed by a designer from any domain. This approach enables design data sharing and real-time collaboration between different electrical/electronic (E/E) design domains, thereby facilitating the realization of design data collaboration, design change management, and product lifetime management (PLM) and product data management (PDM) implementation.

Claims (68)

1 . A method comprising:

providing a database comprising information representative of an electrical/electronic (E/E) architecture of a vehicle, the information including information regarding relationships and connections between components of the E/E architecture of the vehicle and including performance parameters for aspects of the E/E architecture;

receiving, via a graphical user interface (GUI), user input indicating simulation parameters for at least a portion of the E/E architecture of the vehicle;

simulating an operation of the portion of the E/E architecture based on the simulation parameters, the relationships and connections between components of the E/E architecture, and the performance parameters for aspects of the E/E architecture; and

displaying, via the GUI, simulation results generated from simulating the operation of the portion of the E/E architecture.

2 . The method of claim 1 , wherein displaying simulation results comprises displaying a graphical representation of the simulation results over a simulation duration identified by the simulation parameters.

3 . The method of claim 1 , wherein:

simulating the operation of the portion of the E/E architecture comprises simulating an operation of an electronic control unit (ECU) of the E/E architecture, the ECU being associated with one or more functions of the architecture;

the performance parameters comprise a processing requirement for each of the one or more functions and a periodicity of each of the one or more requirements; and

the simulation results comprise a graphical representation of a loading of the ECU over a duration represented by the simulation parameters.

4 . The method of claim 1 , wherein:

simulating the operation of the portion of the E/E architecture comprises simulating an operation of a network bus of the E/E architecture, the network bus being designated for the transmission of one or more signals via one or more frames;

the performance parameters comprise a signal delay for each of the one or more frames and a periodicity of each of the one or more frames; and the simulation results comprise a graphical representation of a loading of the network bus over a duration represented by the simulation parameters.

5 . The method of claim 1 , wherein:

simulating the operation of the portion of the E/E architecture comprises a simulating a propagation of a signal via a signal routing path of the E/E architecture;

the performance parameters comprise a signal delay for each component the signal routing path; and

the simulation results comprise a display of a calculated propagation delay of the signal from a sending component of the signal routing path to a destination component of the signal routing path.

6 . The method of claim 5 , further comprising:

displaying, via the GUI, an expected propagation delay of the signal via the signal routing path.

7 . The method of claim 1 , further comprising:

comparing the simulation results with expected results for the operation of the portion of the E/E architecture.

8 . The method of claim 7 , further comprising:

modifying, via the GUI, one or more aspects of the E/E architecture to generate a modified E/E architecture in response to determining that the simulation results are inconsistent with the expected results;

simulating an operation of a portion of the modified E/E architecture based on the simulation parameters, relationships and connections between components of the modified E/E architecture, and performance parameters for aspects of the modified E/E architecture; and

displaying, via the GUI, simulation results generated from simulating the operation of the portion of the modified E/E architecture.

9 . The method of claim 1 , further comprising:

receiving, via the GUI, user input indicating selection of a signal of the E/E architecture of the vehicle; and

displaying, via the GUI, a topology schematic of a signal routing path of the signal via components of the E/E architecture in response to the user input, the topology schematic comprising a sending component of the signal and at least one or more destination components of the signal.

10 . A method comprising:

providing a database comprising information representative of an electrical/electronic (E/E) architecture of a vehicle, the information including information regarding relationships and connections between components of the E/E architecture of the vehicle;

receiving, via a graphical user interface (GUI), first user input indicating selection of a signal of the E/E architecture of the vehicle; and

displaying, via the GUI, a topology schematic of a signal routing path of the signal via components of the E/E architecture in response to the first user input, the topology schematic comprising a sending component of the signal and at least one or more destination components of the signal.

11 . The method of claim 10 , further comprising:

receiving, via the GUI, second user input indicating selection of a component of the E/E architecture represented in the topology schematic;

displaying, via the GUI, an expected signal propagation delay of the signal to the component via the signal routing path in response to the second user input.

12 . The method of claim 11 , further comprising:

simulating an operation of the E/E architecture to determine an actual signal propagation delay of the signal to the component via the signal routing path in response to the second user input; and

displaying, via the GUI, the actual signal propagation delay of the signal in response to the second user input.

13 . A system comprising:

one or more processors;

a storage device configured to store a database comprising information representative of an electrical/electronic (E/E) architecture of a vehicle, the information including information regarding relationships and connections between components of the E/E architecture of the vehicle and including performance parameters for aspects of the E/E architecture; and

a computer readable memory configured to store executable instructions, the executable instructions comprising:

instructions to manipulate the one or more processors to provide a graphical user interface (GUI);

instructions to manipulate the one or more processors to receive, via the GUI, user input indicating simulation parameters for at least a portion of the E/E architecture of the vehicle;

instructions to manipulate the one or more processor to simulate an operation of the portion of the E/E architecture based on the simulation parameters, the relationships and connections between components of the E/E architecture, and the performance parameters for aspects of the E/E architecture; and

instructions to manipulate the one or more processor to display, via the GUI, simulation results generated from simulating the operation of the portion of the E/E architecture.

14 . The system of claim 13 , wherein the instructions to manipulate the one or more processors to display the simulation results comprises instructions to manipulate the one or more processors to display a graphical representation of the simulation results over a simulation duration identified by the simulation parameters.

15 . The system of claim 13 , wherein:

the instructions to manipulate the one or more processors to simulate the operation of the portion of the E/E architecture comprise instructions to manipulate the one or more processors to simulate an operation of an electronic control unit (ECU) of the E/E architecture, the ECU being associated with one or more functions of the architecture;

the performance parameters comprise a processing requirement for each of the one or more functions and a periodicity of each of the one or more requirements; and

the simulation results comprise a graphical representation of a loading of the ECU over a duration represented by the simulation parameters.

16 . The system of claim 13 , wherein:

the instructions to manipulate the one or more processors to simulate the operation of the portion of the E/E architecture comprise instructions to manipulate the one or more processors to simulate an operation of a network bus of the E/E architecture, the network bus being designated for the transmission of one or more signals via one or more frames;

the performance parameters comprise a signal delay for each of the one or more frames and a periodicity of each of the one or more frames; and

the simulation results comprise a graphical representation of a loading of the network bus over a duration represented by the simulation parameters.

17 . The system of claim 13 , wherein:

the instructions to manipulate the one or more processors to simulate the operation of the portion of the E/E architecture comprise instructions to manipulate the one or more processors to simulate a propagation of a signal via a signal routing path of the E/E architecture;

the performance parameters comprise a signal delay for each component the signal routing path; and

the simulation results comprise a display of a calculated propagation delay of the signal from a sending component of the signal routing path to a destination component of the signal routing path.

18 . The system of claim 17 , wherein the executable instructions further comprise:

instructions to manipulate the one or more processors to display, via the GUI, an expected propagation delay of the signal via the signal routing path.

19 . The system of claim 13 , the executable instructions further comprising:

instructions to manipulate the one or more processors to receive, via the GUI, user input representing a modification to one or more aspects of the E/E architecture to generate a modified E/E architecture in response to the simulation results being inconsistent with the expected results;

instructions to manipulate the one or more processors to simulate an operation of the modified E/E architecture based on the simulation parameters, relationships and connections between components of the modified E/E architecture, and performance parameters for aspects of the modified E/E architecture; and

instructions to manipulate the one or more processors to display, via the GUI, simulation results generated from simulating the operation of the portion of the modified E/E architecture.

20 . The system of claim 13 , wherein the executable instructions further comprise:

instructions to manipulate the one or more processors to receive, via the GUI, user input indicating selection of a signal of the E/E architecture of the vehicle; and

instructions to manipulate the one or more processors to display, via the GUI, a topology schematic of a signal routing path of the signal via components of the E/E architecture in response to the user input, the topology schematic comprising a sending component of the signal and at least one or more destination components of the signal.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0757 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2010
From: FREESCALE SEMICONDUCTOR INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024226/0167 →
RELEASE Recorded Apr 1, 2010
From: CITIBANK, N.A.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 024174/0706 →
SECURITY AGREEMENT Recorded Dec 9, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021936/0772 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2008
From: DONG, YIBING; MOMIN, SALIM
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 021314/0339 →