IP Library Granted Patent US 7,884,354
Granted Patent B2
US 7,884,354 · App. 12/183,565 · Granted Feb 8, 2011

Germanium on insulator (GOI) semiconductor substrates

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Quick Facts
Patent No.
US 7,884,354
App. No.
12/183,565
Granted
Feb 8, 2011
Kind
B2
Abstract

Germanium on insulator (GOI) semiconductor substrates are generally described. In one example, a GOI semiconductor substrate comprises a semiconductor substrate comprising an insulative surface region wherein a concentration of dopant in the insulative surface region is less than a concentration of dopant in the semiconductor substrate outside of the insulative surface region and a thin film of germanium coupled to the insulative surface region of the semiconductor substrate wherein the thin film of germanium and the insulative surface region are simultaneously formed by oxidation anneal of a thin film of silicon germanium (Si 1-x Ge x ) deposited to the semiconductor substrate wherein x is a value between 0 and 1 that provides a relative amount of silicon and germanium in the thin film of Si 1-x Ge x .

Claims (22)

1. An apparatus comprising:

a semiconductor substrate comprising an insulative surface region wherein a concentration of dopant in the insulative surface region is less than a concentration of dopant in the semiconductor substrate outside of the insulative surface region; and

a thin film of germanium coupled to the insulative surface region of the semiconductor substrate wherein the thin film of germanium and the insulative surface region are simultaneously formed by oxidation anneal of a thin film of silicon germanium (Si 1-x Ge x ) deposited to the semiconductor substrate wherein x is a value between 0 and 1 that provides a relative amount of silicon and germanium in the thin film of Si 1-x Ge x .

2. An apparatus according to claim 1 wherein the semiconductor substrate comprises a p-type doped bulk silicon substrate.

3. An apparatus according to claim 1 wherein the concentration of dopant in the insulative surface region is from about 10 12 to about 10 15 atoms/cm 3 and wherein the concentration of dopant in the semiconductor substrate outside of the insulative surface region is about 10 18 atoms/cm 3 .

4. An apparatus according to claim 1 wherein the dopant comprises boron.

5. An apparatus according to claim 1 wherein the oxidation anneal condenses the thin film of germanium from the thin film of Si 1-x Ge x onto the semiconductor substrate, substantially oxidizes the silicon of the thin film of Si 1-x Ge x for removal, and segregates dopant from the semiconductor substrate to the thin film of germanium to form the insulative surface region of the semiconductor substrate.

6. An apparatus according to claim 1 wherein the thin film of silicon germanium, Si 1-x Ge x comprises a thickness from about 200 angstroms (Å) to about 2000 Å of substantially intrinsic silicon germanium Si 1-x Ge x wherein x is from about 0.2 to about 0.8.

7. An apparatus according to claim 1 further comprising:

one or more isolation dielectric structures formed in the semiconductor substrate to provide shallow trench isolation (STI) for one or more electronic devices formed on the semiconductor substrate.

8. A system comprising:

a processor; and

a memory coupled with the processor, wherein the processor or the memory, or combinations thereof, comprise:

a semiconductor substrate comprising an insulative surface region wherein a concentration of dopant in the insulative surface region is less than a concentration of dopant in the semiconductor substrate outside of the insulative surface region; and

a thin film of germanium coupled to the insulative surface region of the semiconductor substrate wherein the thin film of germanium and the insulative surface region are simultaneously formed by oxidation anneal of a thin film of silicon germanium (Si1 -x Ge x ) deposited to the semiconductor substrate wherein x is a value between 0 and 1 that provides a relative amount of silicon and germanium in the thin film of Si 1-x Ge x .

9. A system according to claim 8 wherein the semiconductor substrate comprises a p-type doped bulk silicon substrate.

10. A system according to claim 8 wherein the concentration of dopant in the insulative surface region is from about 10 12 to about 10 15 atoms/cm 3 and wherein the concentration of dopant in the semiconductor substrate outside of the insulative surface region is about 10 18 atoms/cm 3 .

11. A system according to claim 8 wherein the dopant comprises boron.

12. A system according to claim 8 wherein the oxidation anneal condenses the thin film of germanium from the thin film of Si 1-x Ge x onto the semiconductor substrate, substantially oxidizes the silicon of the thin film of Si 1-x Ge x for removal, and segregates dopant from the semiconductor substrate to the thin film of germanium to form the insulative surface region of the semiconductor substrate.

13. A system according to claim 8 wherein the thin film of silicon germanium, Si 1-x Ge x comprises a thickness from about 200 angstroms (Å) to about 2000 Å of substantially intrinsic silicon germanium Si 1-x Ge x wherein x is from about 0.2 to about 0.8.

14. A system according to claim 8 further comprising:

one or more isolation dielectric structures formed in the semiconductor substrate to provide shallow trench isolation (STI) for one or more transistor devices of the processor or the memory, or combinations thereof, formed on the semiconductor substrate.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NUMBERS INCORRECTLY LISTED (REMOVE 17236651, 17411919, 17483279, 17558001) PREVIOUSLY RECORDED ON REEL 72293 FRAME 842. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 1, 2026
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 075695/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2025
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 072293/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2008
From: PILLARISETTY, RAVI; JIN, BEEN-YIH; RACHMADY, WILLY; RADOSAVLJEVIC, MARKO
To: INTEL CORPORATION
Reel/Frame 021506/0143 →