IP Library › Granted Patent US 8,736,617
Granted Patent B2
US 8,736,617 · App. 12/185,698 · Granted May 27, 2014

Hybrid graphic display

Inventors: Stephen Lew (Sunnyvale, CA); Bruce R. Intihar (Sunnyvale, CA); Abraham B. de Waal (San Jose, CA); David G. Reed (Saratoga, CA); Tony Tamasi (Los Gatos, CA); David Wyatt (San Jose, CA); Franck R. Diard (Mountain View, CA); Brad Simeral (San Francisco, CA)
Assignee: Nvidia Corporation
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Quick Facts
Patent No.
US 8,736,617
App. No.
12/185,698
Granted
May 27, 2014
Kind
B2
Abstract

A method of displaying graphics data is described. The method involves accessing the graphics data in a memory subsystem associated with one graphics subsystem. The graphics data is transmitted to a second graphics subsystem, where it is displayed on a monitor coupled to the second graphics subsystem.

Claims (36)

1. A method of displaying graphics data, said method comprising:

accessing said graphics data in a memory subsystem associated with a first graphics subsystem;

rendering said graphics data with said first graphics subsystem to produce rendered graphics data operable to be displayed by said first graphics subsystem;

transmitting said rendered graphics data from said first graphics subsystem to a second graphics subsystem, wherein said rendered graphics data is transmitted to a raster generator of said second graphics subsystem; and

displaying said rendered graphics data on a monitor coupled to said second graphics subsystem, wherein said second graphics subsystem is operable to display said graphic data in response to receiving said rendered graphics data.

2. The method of claim 1 , further comprising:

performing a rendering operation on said graphics data in said first graphics subsystem.

3. The method of claim 2 , wherein said rendering operation is performed by a display engine associated with said first graphics subsystem.

4. The method of claim 1 , wherein said graphics data is transmitted over a virtual channel between said first graphics subsystem and said second graphics subsystem.

5. The method of claim 4 , wherein said virtual channel comprises a dedicated physical connection between said first graphics subsystem and said second graphics subsystem.

6. The method of claim 5 , wherein said dedicated physical connection comprises a connection in accordance with a Display Port protocol.

7. The method of claim 4 , wherein said virtual channel comprises a portion of an existing connection between said first graphics subsystem and said second graphics subsystem allocated for use as said virtual channel.

8. The method of claim 7 , wherein said existing connection comprises a connection in accordance with a peripheral component interconnect express (PCI-E) protocol.

9. The method of claim 4 , wherein said virtual channel comprises transmitting said graphics data as packets of vendor defined message (VDM) data.

10. A system for transmitting graphics data from a first graphics subsystem to a second graphics subsystem, said system comprising:

a memory subsystem, associated with said first graphics subsystem, for storing and said graphics data;

a display engine, coupled to said memory subsystem, for retrieving said graphics data;

a pixel pipeline operable for performing a rendering operation on said graphics data to produce rendered graphics data, wherein said rendered graphics data is operable to be displayed by said first graphics subsystem; and

an input/output (I/O) block, coupled to said display engine, for transmitting said graphics data to said second graphics subsystem, wherein said second graphics subsystem is operable to display said graphic data in response to receiving said graphics data, and wherein said rendered graphics data is transmitted to a raster generator of said second graphics subsystem.

11. The system of claim 10 , wherein said memory subsystem comprises a frame buffer.

12. The system of claim 10 , wherein said display engine comprises:

a direct memory access (DMA) module, for retrieving said graphics data from said memory subsystem, wherein said pixel pipeline is coupled to said DMA module; and

a raster generator, coupled to said pixel pipeline, for outputting said graphics data to an attached monitor.

13. The system of claim 12 , further comprising a logical data path for passing said graphics data from said pixel pipeline to said I/O block.

14. The system of claim 12 , further comprising a logical data path for passing said graphics data from said DMA module to said I/O block.

15. The system of claim 12 , further comprising a logical data path for passing said graphics data from said raster generator to said I/O block.

16. The system of claim 12 , further comprising:

a processing pipeline, for preparing said graphics data for transmission from said first graphics subsystem to said second graphics subsystem.

17. A method of displaying graphics data, said method comprising:

receiving packed graphics data from a first graphics subsystem into a second graphics subsystem, wherein said graphics data is operable for display by said first graphics subsystem;

unpacking said packed graphics data into said graphics data; and

outputting said graphics data to a monitor coupled to said second graphics subsystem, wherein said second graphics subsystem is operable to display said graphic data in response to receiving said graphics data, wherein said rendered graphics data is output by a raster generator of said second graphics subsystem.

18. The method of claim 16 , wherein said packed graphics data is received via a virtual channel connection between said first graphics subsystem and said second graphics subsystem.

19. The method of claim 16 , wherein said unpacking comprises decompressing said graphics data.

20. The method of claim 16 , further comprising:

storing said graphics data in a buffer until it is needed for display.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2008
From: LEW, STEPHEN; INTIHAR, BRUCE R.; DE WAAL, ABRAHAM B.; REED, DAVID G.; TAMASI, TONY; WYATT, DAVID; DIARD, FRANCK R.; SIMERAL, BRAD
To: NVIDIA CORPORATION
Reel/Frame 021337/0088 →
Continuity (1)
Related Publication 20100026692A1 · Feb 4, 2010