Granted Patent B2

US 7,998,806 · App. 12/187,851 · Granted Aug 16, 2011

Abstract

Claims (61)

1. A method of manufacturing a semiconductor device comprising a first transistor formed over a first device region surrounded by a first device separating area in a first area of a substrate, and a second transistor formed over a second device region surrounded by a second device separating area in a second area of the substrate, comprising:

forming an oxidation film over the first and the second device region;

forming an first etching preventing film extending over the first and the second area;

removing the first etching preventing film over the first area;

removing the oxidation film over the first device region and exposing a surface of the first device region;

forming a first gate insulating film having a first thickness over the first device region while the second device region is covered by the oxidation film;

removing the oxidation film over the second device region;

forming a second gate insulating film over the second device region, the second gate insulating film having a second thickness less than the first thickness of the first gate insulating film;

forming a first gate electrode over the first gate insulating film, and forming a second gate electrode over the second gate insulating film; and

forming first source and drain regions in the first device region at both sides of the first gate electrode and

forming second source and drain regions in the second device region at both sides of the second gate electrode.

2. The method according to claim 1 , wherein

the forming the first gate electrode over the first gate insulating film, and the forming the second gate electrode over the second gate insulating film

forms a conductive film over the first area and the second area,

forms a photoresist film on the conductive film,

forms a first resist pattern film on the conductive film on the first area, and a second resist pattern film on the conductive film on the second area,

and

forms the first and second gate electrode being made of the conductive film by etching the conductive film using the first resist pattern film and the second resist pattern film as a mask.

3. The method according to claim 1 , the semiconductor device further comprising a memory cell formed on a third device region surrounded by a third device separation area in a third area of the substrate, the method further comprising;

forming the oxidation film extending over the third device region while the oxidation film extending over the first and the second device regions is formed;

forming the first etching preventing film over the third area while the first etching preventing film extending over the first area and the second area is formed;

removing the first etching preventing film over the third area

removing the oxidation film over the third device region and exposing a surface of the third device region;

forming a tunnel insulating film over the third device;

forming a floating gate on the tunnel insulating film on the third device region;

forming a laminate film comprising a silicon nitride film extending over the first, the second, and the third area;

forming a control gate over the floating gate while the first gate electrode is formed on the first gate insulating film and the second gate electrode is formed on the second gate insulating film; and

forming third source and drain regions in the third device region at both sides of the control gate while the first source and drain regions in the first device region at both sides of the first gate electrode, and the second source and drain regions in the second device region at both sides of the second gate electrode are formed.

4. The method according to claim 3 , wherein

the forming the control gate over the floating gate

forms the conductive film over the third area,

forms the photoresist film on the conductive film on the third area,

forms a third resist pattern film on the conductive film on the third area, and

forms the control gate being made of the conductive film by etching the conductive film the third resist pattern film as a mask.

5. The method according to claim 3 , wherein

the laminate film comprises a first silicon oxidation film, the silicon nitride film formed on the first silicon nitride film, and a second silicon oxidation film formed on the silicon nitride film.

6. The method according to claim 1 , the semiconductor device further comprising a memory cell formed on a third device region surrounded by a third device separation area in a third area of the substrate, a third transistor formed on a fourth region surrounded by a fourth device separation area in a fourth area of the substrate, the method further comprising:

forming the oxidation film extending over the third and the fourth device regions while the oxidation film extending over the first and the second device regions is formed;

forming the first etching preventing film over the third and the fourth areas while the first etching preventing film extending over the first area and the second area is formed;

removing the first etching preventing film over the third area and the fourth area

removing the oxidation film over the third device region and fourth device region and exposing a surface of the third device region and a surface of the fourth device region;

forming a tunnel insulating film over the third device region;

forming a floating gate on the tunnel insulating film on the third device region;

forming a laminate film comprising a silicon nitride film extending over the first, the second, the third, and the fourth area;

exposing a surface of the fourth device region while the second area are covered by the laminate film;

forming a third gate insulating film extending over the fourth device region, and the third gate insulating film having a third thickness greater than the first thickness of the first gate insulating film while the second area are covered by the laminate film;

forming a third gate electrode on the third gate insulating film, and forms a control gate over the floating; and

forming third source and drain regions in the third device region at both sides of the control gate, and fourth source and drain regions in the fourth device region at both sides of the third gate electrode while the first source and drain regions in the first device region at both sides of the first gate electrode and the second source and drain regions in the second device region at both sides of the second gate electrode are formed.

7. The method according to claim 1 , the semiconductor device further comprising a third transistor formed on a third device region surrounded by a third device separation area in a third area of the substrate, the method further comprising:

forming the oxidation film extending over the third device region while the oxidation film extending over the first and the second device regions is formed;

forming the first etching preventing film extending over the third area while the first etching preventing film extending over the first area and the second area is formed;

exposing a surface of the third device region while the second device region and the second area are covered by the first etching preventing film and the oxidation film;

forming a third gate insulating film over the third device region, the third gate insulating film having a third thickness greater than the first thickness of the first insulating film while the second device region and the second area are covered by the oxidation film;

forming a third gate electrode on the third gate insulating film, while the first gate electrode is formed on the first gate insulating film, and the second gate electrode is formed on the second gate insulating film;

forming third source and drain regions in the third device region at both sides of the third gate electrode while the first source and drain regions in the first device region at both sides of the first gate electrode, and the second source and drain regions in the second device region at both sides of the second gate electrode are formed.

8. The method according to claim 7 , further comprising:

forming a conducive film over the first area, the second area and the third area;

forming a photoresist film on the conductive film;

forming a first pattern film on the first device region, a second pattern film on the second device region and a third pattern film on the third device region being made of the photoresist film; and

forming the first, the second, and the third gate electrode made of the conductive film by etching the conductive film using the first, the second and the third pattern film as a mask.

9. The method according to claim 1 , wherein the first etching preventing film is silicon nitride.

Assignments (9)