IP Library Granted Patent US 8,058,082
Granted Patent B2
US 8,058,082 · App. 12/189,635 · Granted Nov 15, 2011

Light-emitting diode with textured substrate

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,058,082
App. No.
12/189,635
Granted
Nov 15, 2011
Kind
B2
Abstract

A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

Claims (44)

1. A method of forming a light-emitting diode (LED) device, the method comprising:

providing a substrate;

forming raised regions on the substrate;

forming a first contact layer over the raised regions, the first contact layer having a non-planar surface and being discontinuous between the raised regions;

forming an active layer over the first contact layer, the active layer having a non-planar surface; and

forming a second contact layer over the active layer, the second contact layer having a planar surface, the second contact layer being continuous over a plurality of the raised regions.

2. The method of claim 1 , wherein the forming raised regions comprises:

forming a mask layer over the substrate;

patterning the mask layer to expose portions of the substrate; and

forming the raised regions on the exposed portions of the substrate.

3. The method of claim 1 , wherein the active layer is discontinuous between the raised regions.

4. The method of claim 1 , wherein the forming the second contact layer comprises:

forming the second contact layer to a thickness greater than a desired thickness; and

planarizing the second contact layer to the desired thickness.

5. The method of claim 1 , wherein the substrate is a bulk silicon substrate.

6. The method of claim 1 , wherein the substrate is a bulk silicon substrate having a ( 100 ) surface orientation.

7. The method of claim 1 , wherein the raised regions comprise SiGe.

8. A method of forming a light-emitting diode (LED) device, the method comprising:

providing a substrate;

forming a dielectric layer over the substrate;

patterning the dielectric layer to form a patterned mask, the patterned mask defining openings in which the substrate is exposed;

forming raised regions on the substrate in the openings; and

forming an LED structure over the raised regions, the LED structure having a top contact layer with a planar surface and a bottom contact layer having a non-planar surface.

9. The method of claim 8 , wherein the substrate is a bulk silicon substrate having a ( 100 ) surface orientation.

10. The method of claim 8 , wherein the raised regions comprise SiGe.

11. The method of claim 8 , wherein the bottom contact layer is not a continuous layer over multiple raised regions.

12. The method of claim 8 , wherein an active layer interposed between the top contact layer and the bottom contact layer has a non-planar surface.

13. The method of claim 8 , wherein the top contact layer extends over a plurality of the raised regions.

14. A method of forming a light-emitting diode (LED) device, the method comprising:

providing a substrate;

forming raised regions on the substrate, wherein the forming raised regions comprises:

forming a mask layer over the substrate;

patterning the mask layer to expose portions of the substrate; and

forming the raised regions on the exposed portions of the substrate;

forming a first contact layer over the raised regions;

forming an active layer over the first contact layer, the active layer having a non-planar surface; and

forming a second contact layer over the active layer, the second contact layer having a planar surface.

15. The method of claim 14 , wherein the first contact layer is discontinuous between the raised regions.

16. The method of claim 14 , wherein the active layer is discontinuous between the raised regions.

17. The method of claim 14 , wherein the forming the second contact layer comprises:

forming the second contact layer to a thickness greater than a desired thickness; and

planarizing the second contact layer to the desired thickness.

18. The method of claim 14 , wherein the substrate is a bulk silicon substrate having a ( 100 ) surface orientation.

19. The method of claim 14 , wherein the raised regions comprise SiGe.

Assignments (6)
CHANGE OF NAME Recorded Apr 22, 2026
From: EPISTAR CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075513/0783 →
MERGER Recorded Feb 23, 2016
From: CHIP STAR LTD.
To: EPISTAR CORPORATION
Reel/Frame 037805/0571 →
CHANGE OF NAME Recorded Feb 23, 2016
From: TSMC SOLID STATE LIGHTING LTD.
To: CHIP STAR LTD.
Reel/Frame 037809/0929 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO REMOVE INCORRECT SERIAL NUMBER 12/896635 FROM THE RECORD PREVIOUSLY RECORDED ON REEL 027856 FRAME 0597. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Mar 16, 2012
From: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
To: TSMC SOLID STATE LIGHTING LTD.
Reel/Frame 027876/0056 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2012
From: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
To: TSMC SOLID STATE LIGHTING LTD.
Reel/Frame 027856/0597 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2008
From: YU, CHEN-HUA; CHIOU, WEN-CHIH; CHEN, DING-YUAN; YU, CHIA-LIN; LIN, HUNG-TA
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 021372/0562 →