IP Library › Granted Patent US 7,585,698
Granted Patent B2
US 7,585,698 · App. 12/190,102 · Granted Sep 8, 2009

Thin film transistor having oxide semiconductor layer and manufacturing method thereof

Assignee: Casio Computer Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,585,698
App. No.
12/190,102
Granted
Sep 8, 2009
Kind
B2
Abstract

A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.

Claims (42)

1. A method of manufacturing a thin film transistor, comprising:

continuously forming a semiconductor thin film forming film including zinc oxide and a protection film forming film;

forming a protection film by etching the protection film forming film;

forming a semiconductor thin film having a substantially same plan-view shape as the protection film, by etching the semiconductor thin film forming film by using the protection film as a mask;

forming a gate insulating film which covers the protection film; and

forming a gate electrode on the gate insulating film.

2. The method according to claim 1 ,

wherein etching of the protection film forming film is reactive plasma etching.

3. The method according to claim 2 ,

wherein the reactive plasma etching is performed by using a reaction gas containing sulferhexafluoride.

4. The method according to claim 1 ,

wherein etching of the semiconductor thin film forming film is performed by using an etching liquid containing sodium hydroxide aqueous solution.

5. The method according to claim 1 ,

wherein a source electrode and a drain electrode are formed before the semiconductor thin film forming film containing zinc oxide and the protection film forming film are continuously formed.

6. The method according to claim 5 ,

wherein a plurality of ohmic contact layer forming layers made of a material including zinc oxide are formed on the source electrode and the drain electrode.

7. The method according to claim 6 ,

wherein the ohmic contact layer forming layers are etched using an etching liquid including an alkaline aqueous solution.

8. The method according to claim 6 ,

wherein after the semiconductor thin film having the plan-view shape is formed, a plurality of ohmic contact layers are formed by etching the ohmic contact layer forming layers by using the protection film as a mask.

9. The method according to claim 8 ,

wherein etching of the ohmic contact layer forming layers is performed by using an etching liquid containing sodium hydroxide aqueous solution.

10. The method according to claim 1 ,

wherein an upper insulating film is formed on the gate electrode.

11. The method according to claim 10 ,

wherein an auxiliary capacitor electrode is formed on the upper insulating film.

12. The method according to claim 11 ,

wherein the auxiliary capacitor electrode is formed so as to substantially entirely cover the semiconductor thin film.

13. The method according to claim 12 ,

wherein an overcoat film is formed on the auxiliary capacitor electrode.

14. The method according to claim 13 ,

wherein a pixel electrode electrically connected to the source electrode is formed on the overcoat film.

15. The method according to claim 14 ,

wherein forming the pixel electrode comprises forming a contact hole that penetrates through the overcoat film, the upper insulating film, and the gate insulating film to expose a part of the source electrode.

16. The method according to claim 1 ,

wherein an auxiliary capacitor electrode electrically insulated from the gate electrode is formed on the gate insulating film.

17. The method according to claim 16 ,

wherein an overcoat film is formed on the gate insulating film and the gate electrode.

18. The method according to claim 17 ,

wherein a pixel electrode connected to the source electrode is formed on the overcoat film.

19. The method according to claim 18 ,

wherein forming the pixel electrode comprises exposing a part of the source electrode by penetrating the gate electrode and the overcoat film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2013
From: REMSEN INNOVATION, LLC
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 030951/0988 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2012
From: CASIO COMPUTER CO., LTD.
To: REMSEN INNOVATION, LLC
Reel/Frame 028265/0258 →
Priority Claims (1)
JP 2005-170348 · Jun 10, 2005 · national
Continuity (2)
Division 1144863300 · Jun 7, 2006
Related Publication 20080305575A1 · Dec 11, 2008