Method of manufacture of semiconductor integrated circuit device and semiconductor integrated circuit device
View Patent ↗In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N 2 /Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.
1. A method of manufacturing a semiconductor integrated circuit device, comprising steps of:
(a) forming a first wiring over a semiconductor substrate, wherein the first wiring is formed of a copper-containing material as a main component;
(b) forming a first insulating film over the first wiring;
(c) forming a second insulating film over the first insulating film, wherein the second insulating film is formed of an organosiloxane as a main component, and wherein a thickness of the second insulating film is thicker than a thickness of the first insulating film;
(d) forming a first patterned masking layer over the second insulating film;
(e) after the step (d), forming a through hole in the second insulating film with the first patterned masking layer thereover, by plasma etching in a first gas atmosphere containing a fluorocarbon gas and a nitrogen gas;
(f) after the step (e), removing the first patterned masking layer;
(g) after the step (f), forming a second patterned masking layer over the second insulating film;
(h) after the step (g), forming a trench in the second insulating film with the second patterned masking layer thereover, by plasma etching in a second gas atmosphere containing a fluorocarbon gas and a nitrogen gas, wherein a depth of the trench is shallower than a depth of the through hole; and
(i) after the step (h), removing the first insulating film of the bottom of the through hole, thereby a surface of the first wiring is exposed.
2. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the first and second gas atmospheres include an oxygen gas.
3. A method of manufacturing a semiconductor integrated circuit device according to claim 2 , wherein, in the first and second gas atmospheres, a flow rate of the oxygen gas is smaller than a flow rate of the fluorocarbon gas, respectively.
4. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the first and second gas atmospheres do not include an oxygen gas.
5. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the first patterned masking layer is a photoresist film.
6. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the second patterned masking layer is a photoresist film.
7. A method of manufacturing a semiconductor integrated circuit device according to the claim 1 , wherein the second insulating film is formed by a spin coating method.
8. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the first gas atmosphere includes an argon gas, and
wherein the argon gas has the maximum flow rate of the first gas atmosphere.
9. A method of manufacturing a semiconductor integrated circuit device according to the claim 1 , wherein the first gas atmosphere includes a helium gas.
10. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the second gas atmosphere includes an argon gas, and
wherein the argon gas has the maximum flow rate of the second gas atmosphere.
11. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the second gas atmosphere includes a helium gas.
12. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the step (h) is performed without an etching stopper film.
13. A method of manufacturing a semiconductor integrated circuit device according to the claim 1 , wherein the first insulating film has a function for preventing copper diffusion.
14. A method of manufacturing a semiconductor integrated circuit device, comprising steps of:
(a) forming a first wiring over a semiconductor substrate, wherein the first wiring is formed of a copper-containing material as a main component;
(b) forming a first insulating film over the first wiring;
(c) forming a second insulating film over the first insulating film, wherein the second insulating film is formed of an organosiloxane as a main component, and wherein a thickness of the second insulating film is thicker than a thickness of the first insulating film;
(d) forming a first patterned masking layer over the second insulating film;
(e) after the step (d), forming a through hole in the second insulating film with the first patterned masking layer thereover, by plasma etching in a first gas atmosphere containing fluorocarbon gas and a nitrogen gas;
(f) after the step (e), removing the first patterned masking layer;
(g) after the step (f), forming a second patterned masking layer over the second insulating film;
(h) after the step (g), forming a trench in the second insulating film with the second patterned masking layer thereover, by plasma etching in a second gas atmosphere containing fluorocarbon gas and a nitrogen gas, wherein a depth of the trench is shallower than a depth of the through hole;
(i) after the step (h), removing the second patterned masking layer;
(j) after the step (i), removing the first insulating film at the bottom of the through hole, thereby a surface of the first wiring is exposed; and
(k) embedding a conductive film formed of copper-maintaining material in the through hole and the trench.
15. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , further comprising steps of:
forming a barrier metal film in the through hole and the trench between the steps (j) and (k),
wherein, in the step (k), the conductive film is formed over the barrier metal film.
16. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the first and second gas atmospheres include an oxygen gas.
17. A method of manufacturing a semiconductor integrated circuit device according to the claim 16 , wherein, in the first and second gas atmospheres, a flow rate of the oxygen gas is smaller than a flow rate of the fluorocarbon gas, respectively.
18. A method of manufacturing a semiconductor integrated circuit device according to the claim 14 , wherein the first and second gas atmospheres do not include an oxygen gas.
19. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the first patterned masking layer is a photoresist film.
20. A method of manufacturing a semiconductor integrated circuit device according to the claim 14 , wherein the second patterned masking layer is a photoresist film.
21. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the second insulating film is formed by a spin coating method.
22. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the first gas atmosphere includes an argon gas, and
wherein the argon gas has the maximum flow rate of the first gas atmosphere.
23. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the first gas atmosphere includes a helium gas.
24. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the second gas atmosphere includes an argon gas, and
wherein the argon gas has the maximum flow rate of the second gas atmosphere.
25. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the second gas atmosphere includes a helium gas.
26. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the step (h) is performed without an etching stopper film.
27. A method of manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the first insulating film has a function for preventing copper diffusion.