IP Library Granted Patent US 8,406,365
Granted Patent B2
US 8,406,365 · App. 12/194,744 · Granted Mar 26, 2013

Frequency reacquisition in a clock and data recovery device

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Quick Facts
Patent No.
US 8,406,365
App. No.
12/194,744
Granted
Mar 26, 2013
Kind
B2
Abstract

A system and method are provided for reacquiring a non-synchronous communication signal in a clock and data recovery (CDR) device frequency synthesizer. The method initially acquires the phase of a non-synchronous communication signal having an input data frequency. In response to acquiring the phase of the input data frequency, a synthesized signal is generated having an output frequency. Also as a result of acquiring the input data frequency, a frequency ratio value is selected. The output frequency is divided by the selected frequency ratio value, creating a divisor signal having a divisor frequency, which is compared to a reference signal frequency. In response to the comparison, the frequency ratio value is saved in a tangible memory medium. In response to losing phase-lock with the communication signal, the frequency ratio value is retrieved from memory. After acquiring the input data frequency, the phase of the communication signal is reacquired.

Claims (61)

1. A method for reacquiring a non-synchronous communication signal, comprising:

selecting a frequency ratio value having a non-predetermined value;

acquiring a phase of a non-synchronous communication signal having a non-predetermined input data frequency;

in response to acquiring the phase of the input data frequency, generating a synthesized signal having an output frequency;

dividing the output frequency by the selected frequency ratio value, creating a divisor signal having a divisor frequency;

comparing the divisor frequency to a reference signal frequency;

in response to losing phase-lock with the non-synchronous communication signal, dividing the output frequency by the selected frequency ratio value and creating a frequency detection signal;

comparing the frequency detection signal to the reference signal frequency; and

acquiring the input data frequency of the non-synchronous communication signal.

2. The method of claim 1 further comprising:

subsequent to acquiring the input data frequency of the non-synchronous communication signal, comparing the output frequency to the input data frequency; and,

reacquiring the phase of the non-synchronous communication signal.

3. The method of claim 1 wherein selecting the frequency ratio value comprises selecting a frequency ratio value of the output frequency divided by the reference signal frequency.

4. The method of claim 3 wherein comparing the divisor frequency to the reference signal frequency includes:

counting divisor signal cycles, creating a first count;

counting reference signal cycles, creating a second count;

finding a difference between the first and second counts; and,

comparing the difference to a maximum threshold value.

5. The method of claim 4 wherein comparing the difference to the maximum threshold value comprises:

ending a coarse search for a frequency ratio value if the difference is less than the maximum threshold value; and,

reselecting a frequency ratio value if the difference is greater than the maximum threshold value.

6. The method of claim 5 wherein selecting the frequency ratio value comprises:

accessing a range of frequency ratio values corresponding to a range of output frequencies;

selecting a first frequency ratio value from the range of frequency ratio values; and,

wherein reselecting a frequency ratio value if the difference is greater than the maximum threshold value comprises selecting a second frequency value from the range of frequency ratio values.

7. The method of claim 6 further comprising:

accepting search algorithm commands selected from a criterion group comprising step size, step origin, step direction, or combinations of the above-mentioned criteria;

wherein reselecting a frequency ratio value if the difference is greater than the maximum threshold value comprises selecting first and second frequency ratio values in response to the search algorithm commands.

8. The method of claim 5 further comprising:

accepting tolerance commands for selecting the maximum threshold value; and,

wherein reselecting the frequency ratio value if the difference is greater than the maximum threshold value comprises reselecting the frequency ratio value if the difference is greater than the selected maximum tolerance value.

9. The method of claim 5 wherein comparing the divisor frequency to the reference signal frequency includes creating first and second counts with respect to a first time duration; and,

the method further comprising:

subsequent to ending the coarse search, initiating a fine search by creating first and second counts with respect to a second time duration, longer than the first time duration.

10. The method of claim 1 wherein comparing the frequency detection signal to the reference signal frequency comprises initially selecting a synthesized signal source from a plurality of synthesized signal sources, each having a unique output frequency band.

11. A system for reacquiring a non-synchronous communication signal, comprising:

a first synthesizer having an output configured to supply a synthesized signal having an output frequency locked in phase to a non-synchronous communication signal having a non-predetermined input data frequency;

a calculator module having an input configured to accept the synthesized signal, the calculator module selecting a frequency ratio value having a non-predetermined value, dividing the output frequency by the selected frequency ratio value, and supplying a divisor signal having a divisor frequency at an output;

an epoch counter having inputs configured to accept the divisor frequency and a reference signal frequency, the epoch counter comparing the divisor frequency to the reference signal frequency;

a divider, selectable engaged in a frequency acquisition mode, having an input configured to accept the selected frequency ratio value, an input configured to accept the synthesized signal output frequency, and an output configured to supply a frequency detection signal equal to the output frequency divided by the frequency ratio value; and

a frequency detector, selectively engaged in the frequency acquisition mode, with an input configured to accept the reference signal frequency, an input configured to accept the frequency detection signal, and an output configured to supply frequency information from a comparison of the frequency detection signal and the reference signal frequency;

wherein the epoch counter, in response to a loss of lock between the synthesized signal and the communication signal in the phase-lock mode, triggers the frequency acquisition mode.

12. The system of claim 11 further comprising:

a phase detector, selectable engaged in a phase-lock mode, with an input configured to accept the non-synchronous communication signal, an input configured to accept the synthesized signal, and an output configured to supply phase information;

wherein the first synthesizer has an input configured to accept information selected from a group consisting of phase information in the phase-lock mode and frequency information in the frequency acquisition mode.

13. The system of claim 12 wherein the phase detector compares the communication signal to the synthesized signal in the phase-lock mode and reacquires the phase of the communication signal, subsequent to frequency detector acquiring the input data frequency of the communication signal in the frequency acquisition mode.

14. The system of claim 11 wherein the calculator module selects a frequency ratio value equal to the output frequency divided by the reference signal frequency.

15. The system of claim 14 wherein the epoch counter compares the divisor frequency to the reference signal frequency by counting divisor signal cycles and creating a first count, counting reference signal cycles and creating a second count, finding a difference between the first and second counts, and comparing the difference to a maximum threshold value input.

16. The system of claim 15 wherein the epoch counter compares the difference to the maximum threshold value by ending a coarse search for a frequency ratio value if the difference is less than the maximum threshold value; and,

wherein the calculator module reselects a frequency ratio value if the difference is greater than the maximum threshold value.

17. The system of claim 16 wherein the calculator module selects the frequency ratio value by accessing a range of frequency ratio values corresponding to a range of output frequencies, and selects a first frequency ratio value from the range of frequency ratio values; and,

wherein the calculator module reselects the frequency ratio value by selecting a second frequency value from the range of frequency ratio values.

18. The system of claim 17 further comprising:

a search module having an output configured to supply search algorithm commands selected from a criterion group comprising step size, step origin, step direction, or combinations of the above-mentioned criteria; and,

wherein the calculator module selects first and second frequency ratio values in response to the search algorithm commands accepted at an input.

19. The system of claim 16 wherein the epoch counter has an input configured to accept tolerance commands for selecting the maximum threshold value; and,

wherein the calculator module reselects a frequency ratio value if the difference is greater than the selected maximum tolerance value.

20. The system of claim 16 wherein the epoch counter compares the divisor frequency to the reference signal frequency by creating first and second counts with respect to a first time duration, and subsequent to ending the coarse search, initiates a fine search by creating first and second counts with respect to a second time duration, longer than the first time duration.

21. The system of claim 12 further comprising:

a plurality of synthesizers, each having a unique output frequency band; and,

wherein the first synthesizer is selected from the plurality of synthesizers prior to the frequency detector acquiring the non-synchronous communication signal input data frequency in the frequency acquisition mode.

Assignments (3)
SECURITY INTEREST Recorded May 11, 2017
From: MACOM CONNECTIVITY SOLUTIONS, LLC (SUCCESSOR TO APPLIED MICRO CIRCUITS CORPORATION)
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 042444/0891 →
MERGER AND CHANGE OF NAME Recorded May 8, 2017
From: APPLIED MICRO CIRCUITS CORPORATION; MACOM CONNECTIVITY SOLUTIONS, LLC
To: MACOM CONNECTIVITY SOLUTIONS, LLC
Reel/Frame 042423/0700 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2008
From: DO, VIET; EKER, MEHMET
To: APPLIED MICRO CIRCUITS CORPORATION
Reel/Frame 021416/0032 →