IP Library Granted Patent US 8,048,802
Granted Patent B2
US 8,048,802 · App. 12/197,335 · Granted Nov 1, 2011

Method for forming interlayer insulating film in semiconductor device

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Quick Facts
Patent No.
US 8,048,802
App. No.
12/197,335
Granted
Nov 1, 2011
Kind
B2
Abstract

A method for forming an interlayer insulating film includes providing a semiconductor substrate having a first substrate region with a plurality of metal wiring and a second substrate region having no metal wiring, and then forming an insulating film dummy pattern in the second substrate region, wherein the insulating film dummy pattern has the same thickness as the metal wiring, and then forming an interlayer insulating film over the semiconductor substrate including the insulating film dummy pattern.

Claims (30)

1. A method for forming an interlayer insulating film in a semiconductor device comprising:

providing a semiconductor substrate having a first substrate region with a plurality of metal wirings and a second substrate region having no metal wiring;

forming an insulating film dummy pattern in the second substrate region, wherein the insulating film dummy pattern has the same thickness as the metal wiring; and

forming an interlayer insulating film over the semiconductor substrate including the insulating film dummy pattern,

wherein forming the insulating film dummy pattern comprises:

reflowing a photoresist pattern on the metal wirings; forming a first insulating film over the semiconductor substrate covering the reflowed photoresist pattern on a top surface of each of the metal wirings; and removing the first insulating film formed on the reflowed photoresist pattern.

2. The method of claim 1 , wherein providing the semiconductor substrate comprises:

forming a second insulating film on the semiconductor substrate; and then forming the metal wirings on the second insulating film in the first substrate region.

3. The method of claim 1 , wherein providing the semiconductor substrate comprises:

forming a metal film on the semiconductor substrate; and then

forming the photoresist pattern on the metal film and then performing an etching process on the metal film using the photoresist pattern as an etching mask to form the metal wirings in the first substrate region.

4. The method of claim 1 , wherein the first insulating film comprises a silicon nitride (SiN) film.

5. The method of claim 1 , wherein reflowing the photoresist pattern comprises performing a thermal treatment process on the photoresist pattern and thereafter hardening the reflowed photoresist pattern such that the reflowed photoresist pattern covers the uppermost surface and sidewalls of the metal wirings.

6. The method of claim 1 , wherein forming the insulating film dummy pattern comprises simultaneously removing the reflowed photoresist pattern and the first insulating film in the first substrate region.

7. A method comprising:

forming a first insulating film over a semiconductor substrate having a first substrate region and a second a substrate region; and then

sequentially forming a metal layer and a photoresist layer over the first insulating film; and then

forming a plurality of metal wirings and a plurality of photoresist patterns on the metal wirings in the first substrate region of the semiconductor substrate by performing a first etching process; and then

reducing the viscosity of the photoresist patterns such that the photoresist patterns are reflowed over the uppermost surface and sidewalls of a respective metal wiring; and then

increasing the viscosity of the photoresist patterns; and then

forming a second insulating film over the first and second substrate regions after increasing the viscosity of the photoresist patterns; and then

forming a second insulating film dummy pattern in the second substrate region by simultaneously removing the photoresist patterns and a portion of the second insulating film formed in the first substrate region.

8. The method of claim 7 , wherein reducing the viscosity of the photoresist patterns comprises performing a thermal treatment process on the substrate including the metal wirings and the photoresist patterns.

9. The method of claim 8 , wherein the thermal treatment process reflows the photoresist patterns.

10. The method of claim 7 , wherein increasing the viscosity of the photoresist patterns comprises performing a cooling process on the substrate including the metal wirings and the photoresist patterns.

11. The method of claim 10 , wherein the cooling process hardens the photoresist patterns.

12. The method of claim 7 , wherein the second insulating film comprises a silicon nitride (SiN) film.

13. The method of claim 7 , further comprising, after forming the second insulating film dummy pattern:

forming a third insulating film over the first and second substrate regions including the metal wirings and the second insulating film dummy pattern.

14. The method of claim 7 , wherein the second insulating film dummy pattern has the same thickness as the metal wirings.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD.
Reel/Frame 044559/0819 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2008
From: CHOE, HO-YEONG
To: DONGBU HITEK CO., LTD.
Reel/Frame 021433/0136 →