Receiver I/Q group delay mismatch correction
View Patent ↗A device for minimizing group delay mismatch in a quadrature receiver ( 402 ) having an in-phase channel and a quadrature-phase channel. The device includes a microprocessor ( 465 ) for determining an I/Q phase imbalance between digital signals on an in-phase channel and digital signals on a quadrature-phase channel, and for calculating a group delay mismatch between the in-phase channel and the quadrature-phase channel, and a group delay equalizer ( 426 ). The group delay equalizer includes a delay line ( 505 and 605 ) for delaying one of the in-phase channel and the quadrature-phase channel by one of a plurality of delays, based on an amount of group delay mismatch.
1. A quadrature receiver, comprising:
an analog portion for receiving a radio frequency signal, the analog portion including
an in-phase channel including an analog-to-digital converter for outputting an in-phase digital signal including discrete samples of the in-phase digital signal, and
a quadrature-phase channel including an analog-to-digital converter for outputting a quadrature-phase digital signal including discrete samples of the quadrature-phase digital signal; and
a digital portion, coupled to the analog portion, the digital portion including
a group delay equalizer for receiving the in-phase digital signal and the quadrature-phase digital signal from the analog portion, wherein the group delay equalizer delays one of the in-phase and quadrature-phase digital signals by one or more samples based upon an amount of a group delay mismatch, the group delay equalizer producing a linear group delay mismatch versus frequency response to approximately counteract a non-linear group delay mismatch versus frequency response at an output of the analog portion, the group delay equalizer having an in-phase output and a quadrature-phase output, and
circuitry for determining a phase imbalance between the in-phase channel and the quadrature-phase channel of the received radio frequency signal at a calibration frequency, the circuitry for determining including
a processor for producing a complex number whose value is based on the amount of the phase imbalance,
an I-channel downsampling filter,
a Q-channel downsampling filter,
a single-tap complex multiplier, coupled to an output of the Q-channel downsampling filter, for multiplying the output of the Q-channel downsampling filter with the complex number, the single-tap complex multiplier having a real output, and
an adder for adding the real output of the single-tap complex multiplier to an output of the I-channel oversampling filter to reduce the phase imbalance between the in-phase channel and the quadrature-phase channel of the received radio frequency signal.
2. A device for minimizing group delay mismatch in a quadrature receiver having an in-phase channel and a quadrature-phase channel, the device comprising:
a processor, coupled to the quadrature receiver, for determining an I/Q phase imbalance between digital signals of the in-phase channel and the digital signals of the quadrature-phase channel, and for calculating, from the phase imbalance, the group delay mismatch between the in-phase channel and the quadrature-phase channel; and
a group delay equalizer, coupled to the processor, including:
a first multiplexer having an input coupled to the in-phase channel and another input coupled to the quadrature-phase channel of the quadrature receiver, a first control input coupled to the processor, and a first multiplexer output,
a delay line, coupled to the first multiplexer output of the first multiplexer, for delaying one of the in-phase channel and the quadrature-phase channel by one of a plurality of delays,
a second multiplexer having a plurality of inputs coupled to the delay line, a second control input coupled to the processor, and a second multiplexer output,
a third multiplexer having an input coupled to the in-phase channel and another input coupled to the second multiplexer output, a third control input coupled to the processor, and a third multiplexer output, and
a fourth multiplexer having an input coupled to the quadrature-phase channel and another input coupled to the second multiplexer output, a fourth control input coupled to the processor, and a fourth multiplexer output.
3. The device of claim 2 , further including a multiplier for multiplying the fourth multiplexer output with a complex number having a value selected to reduce the phase imbalance between the in-phase channel and the quadrature-phase channel of the quadrature receiver, the multiplier having a real output and an imaginary output.
4. The device of claim 3 , wherein the value of the complex number is based on an amount of the phase imbalance.
5. The device of claim 4 , wherein the real output is added to the third multiplexer output.
6. The device of claim 5 , wherein the group delay equalizer corrects for at least some of the group delay mismatch, and in which the real output is added to the third multiplexer output to correct for at least some of the phase imbalance.
7. The device of claim 2 , wherein the group delay equalizer produces a linear group delay mismatch versus frequency response to approximately counteract a non-linear group delay mismatch versus frequency response.
8. A method of a quadrature receiver having an in-phase channel and a quadrature-phase channel, comprising the steps of:
determining an I/Q phase imbalance between digital signals of the in-phase channel and the digital signals of the quadrature-phase channel, the digital signals comprising samples;
calculating, by a group delay equalizer, from the phase imbalance, a group delay mismatch between the in-phase channel and the quadrature-phase channel, the group delay equalizer coupled to a quadrature-phase downsampling filter; and
delaying signals of one of the in-phase channel and the quadrature-phase channel by one or more samples, a number of samples being based upon an amount of the group delay mismatch, such that the group delay equalizer corrects for at least some of the group delay mismatch,
wherein the quadrature receiver includes a single-tap complex multiplier coupled to an output of the quadrature-phase downsampling filter, and the method includes, subsequent to the step of delaying, a step of multiplying imaginary signals of the quadrature-phase channel with a complex number C 0 having a value selected to reduce the I/Q phase imbalance, the single-tap complex multiplier having a real output and an imaginary output, and wherein the real output is added to real signals of the in-phase channel, and
wherein the complex number C 0 is computed determined as follows:
inject into the quadrature receiver an unmodulated test sinusoid at RF frequency so that ±f CAL are resulting baseband frequencies,
measure amplitude and phase of the unmodulated test sinusoid of both the in-phase channel and the quadrature-phase channel relative to a common reference sinusoid by correlating the unmodulated test sinusoid with the common reference sinusoid,
perform a single-bin discrete Fourier transform both the in-phase channel and the quadrature-phase channel to produce two complex values, I CAL and Q CAL , and
compute C 0 =conjugate{−j*I CAL /Q CAL }.
9. The method of claim 8 , wherein the step of determining the I/Q phase imbalance includes the steps of:
injecting into the quadrature receiver an unmodulated sinusoidal signal at a test radio frequency to produce a baseband signal at a negative calibration frequency and a baseband signal at a positive calibration frequency;
measuring, based on the in-phase channel, the phase of the baseband signal at the negative calibration frequency and the phase of the baseband signal at the positive calibration frequency; and
measuring, based on the quadrature-phase channel, the phase of the baseband signal at the negative calibration frequency and the phase of the baseband signal at the positive calibration frequency.
10. The method of claim 8 , wherein the quadrature receiver receives a non-spread-spectrum digital radio frequency signal.