IP Library › Granted Patent US 7,733,166
Granted Patent B2
US 7,733,166 · App. 12/201,052 · Granted Jun 8, 2010

Equalizer filters including a low-pass filter unit and an equalizer having a group delay control unit and related methods

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,733,166
App. No.
12/201,052
Granted
Jun 8, 2010
Kind
B2
Abstract

Provided is a filter used for an equalizer, the filter including: a first low-pass filter unit receives an input signal and performs low frequency band filtering on the input signal; and an equalization unit that receives an output signal from the first low-pass filter unit. The equalization unit may comprise a plurality of serially connected biquad low-pass filter units, and may control a value of a capacitor that is used to control a group delay value that is generated during equalization. Thus, the filter can compensate for group delay without including a separate all pass filter, thereby reducing surface area and power consumption.

Claims (66)

1. A filter for an equalizer, the filter comprising:

a first low-pass filter unit that is configured to receive an input signal; and

an equalization unit that is configured to receive an output signal of the first low-pass filter unit and that is configured to amplify the received output signal with a variable gain value,

wherein the equalization unit comprises a plurality of serially connected biquad low-pass filter units, and is configured to control a value of a capacitor of the last of the plurality of biquad low-pass filter units to control a group delay value that is generated during equalization.

2. The filter of claim 1 , wherein the output of the low pass filter unit is received by a first of the serially connected biquad low-pass filter units, and wherein the equalization unit further comprises a boosting block that is connected in parallel to the first of the plurality of serially connected biquad low-pass filter units.

3. The filter of claim 2 , wherein each of the biquad low-pass filter units comprises two transconductance-capacitor g m -C filters.

4. The filter of claim 3 , wherein the first low-pass filter unit comprises a transconductance-capacitor g m -C filter.

5. The filter of claim 2 , wherein the boosting block comprises a high-pass filter unit and a g mk amplifier that is serially connected to the high-pass filter, and is configured to generate a pair of symmetric zeros.

6. The filter of claim 5 , wherein the pair of symmetric zeros are combined with one pair of symmetric pole values which are generated in the biquad low-pass filter units, and equalize the input signal to have a predetermined amplitude.

7. The filter of claim 5 , wherein the first low-pass filter unit comprises:

a first g m filter that is configured to receive and amplify the input signal; and

a first capacitor that has an input terminal that is connected to an output terminal of the first g m filter.

8. The filter of claim 7 , wherein the plurality of serially connected biquad low-pass filter units unit comprises n biquad low-pass filter units that form a second amplifier, wherein a k-th biquad low-pass filter unit indicates the biquad low-pass filter connected to k th of the n biquad low-pass filter units, where k is an integer having a value in the range 1≦k≦n, and

wherein the k th biquad low-pass filter unit comprises:

a first g m amplifier that has an input terminal that is connected to an output terminal of a (k−1) th biquad low-pass filter unit;

a second g m amplifier that has an input terminal that is connected to an output terminal of the first g m amplifier, and that has an output terminal that is connected to an input terminal of the (k+1) th biquad low-pass filter unit;

a third g m amplifier that has an input terminal that is connected to the output terminal of the second g m amplifier, and that has an output terminal that is connected to the output terminal of the second g m amplifier;

a fourth g m amplifier that has an input terminal that is connected to an output terminal of the third g m amplifier and that has an output terminal that is connected to the output terminal of the first g m amplifier;

a second capacitor that has a first terminal that is connected to the output terminal of the first g m amplifier and a second terminal that is connected to a reference voltage; and

a third capacitor that has a first terminal that is connected to the output terminal of the second g m amplifier and a second terminal that is connected to the reference voltage.

9. The filter of claim 7 , wherein the first biquad low-pass filter unit comprises:

a first g m amplifier that has an input terminal that is connected to an output of the first g m amplifier of the first low-pass filter unit;

a second g m amplifier that has an input terminal that is connected to an output terminal of the first g m amplifier and that has an output terminal that is connected to an input terminal of a second biquad low-pass filter unit;

a third g m amplifier that has as input terminal that is connected to an output terminal of the second g m amplifier and that has an output terminal that is connected to the output terminal of the second g m amplifier;

a fourth g m amplifier that has an input terminal that is connected to an output terminal of the third g m amplifier and that has an output terminal that is connected to the output terminal of the first g m amplifier;

a second capacitor that has a first terminal that is connected to the output terminal of the first g m amplifier and a second terminal that is connected to a reference voltage; and

a third capacitor that has a first terminal that is connected to the output terminal of the second g m amplifier and a second terminal that is connected to a reference voltage.

10. The filter of claim 9 , wherein the boosting block further comprises:

an amplifier that has an input terminal that is connected to a terminal of the high-pass filter; and

a resistance that is connected between the input terminal of the amplifier and an input terminal of the g mk amplifier,

wherein the input terminal of the g mk amplifier is connected to an output terminal of the amplifier, and

wherein the resistance is connected between the input terminal of the amplifier and the input terminal of the g mk amplifier.

11. The filter of claim 7 , wherein the plurality of serially connected biquad low-pass filter units comprises three serially connected biquad low-pass filter units.

12. The filter of claim 11 , wherein the first biquad low-pass filter comprises:

a second g m filter that has an input terminal that is connected to the output terminal of the first g m filter;

a second capacitor that has a terminal that is connected to the output terminal of the second g m filter;

a third g m filter that has an input terminal that is connected to the output terminal of the second g m filter; and

a third capacitor that has a terminal that is connected to an output terminal of the third g m filter.

13. The filter of claim 12 , wherein the second biquad low-pass filter unit comprises:

a fourth g m filter that has an input terminal that is connected to the output terminal of the third g m filter;

a fourth capacitor that has a terminal that is connected to an output terminal of the fourth g m filter;

a fifth g m filter that has an input terminal that is connected to the output terminal of the fourth g m filter; and

a fifth capacitor that has a terminal that is connected to an output terminal of the fifth g m filter.

14. The filter of claim 13 , wherein the third biquad low-pass filter unit comprises:

a sixth g m filter that has an input terminal that is connected to the output terminal of the fifth g m filter;

a sixth capacitor that has a terminal that is connected to an output terminal of the sixth g m filter;

a seventh g m filter that has an input terminal that is connected to the output terminal of the sixth g m filter; and

a seventh capacitor that has a terminal that is connected to the output terminal of the seventh g m filter.

15. The filter of claim 14 , wherein the filter controls a group delay value which is generated during equalization by controlling the value of the seventh capacitor.

16. A filter for an equalizer, the filter comprising:

an equalization unit that includes a plurality of serially connected biquad low-pass filters and an adjustable capacitor, wherein the equalization unit is configured to amplify an input signal with a variable gain and to control a group delay value that is generated during equalization; and

a filter having an output that is connected to an input of the equalization unit.

17. The filter of claim 16 , wherein the adjustable capacitor is part of one of the biquad low-pass filters, and wherein the filter is a low pass filter.

18. The filter of claim 17 , wherein each of the biquad low-pass filter units comprises two transconductance-capacitor g m -C filters and wherein the low-pass filter unit comprises a transconductance-capacitor g m -C filter.

19. The filter of claim 18 , further comprising a high-pass filter unit and a g mk amplifier that is serially connected to the high-pass filter, wherein the serially connected high-pass filter unit and g mk amplifier are connected in parallel to a first of the plurality of serially connected biquad low-pass filters.

20. The filter of claim 19 , wherein the first low-pass filter unit comprises:

a g m filter that is configured to receive and amplify the input signal; and

a capacitor that has an input terminal that is connected to an output terminal of the g m filter.

21. A method of processing an output signal of an optical pick-up unit, the method comprising:

passing the output signal of the optical pick-up unit through a filter;

adjusting a value of a capacitor of an equalization unit to reduce a group delay characteristic of the equalization unit for the filtered output signal; and

passing the filtered output signal through the equalization unit.

22. The method of claim 21 , wherein the filter is a low-pass filter, and wherein the equalization unit includes a high pass filter and a g mk amplifier coupled in parallel to one or more of a plurality of filter stages included in the equalization unit.

23. The method of claim 22 , wherein the plurality of filter stages comprise a plurality of serially connected biquad low-pass filters.

24. The method of claim 23 , wherein the gain value is based on a resistance value and a capacitance value associated with the high pass filter and a g mk value of the g mk amplifier.

25. The method of claim 24 , wherein the capacitor is part of the last of the plurality of serially connected biquad low-pass filters.

Assignments (1)
CORRECTIVE ASSIGNMENT TO CORRECT THE SERIAL NO. FROM 12/021,052 PREVIOUSLY RECORDED ON REEL 021460 FRAME 0489. ASSIGNOR(S) HEREBY CONFIRMS THE THE CORRECT SERIAL NO. IS 12/201,052. Recorded Sep 22, 2008
From: HAN, YUN-CHEOL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 021562/0261 →
Priority Claims (1)
KR 10-2007-0094190 · Sep 17, 2007 · national
Continuity (1)
Related Publication 20090072896A1 · Mar 19, 2009