IP Library Granted Patent US 8,099,560
Granted Patent B2
US 8,099,560 · App. 12/201,228 · Granted Jan 17, 2012

Synchronization mechanism for use with a snoop queue

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Quick Facts
Patent No.
US 8,099,560
App. No.
12/201,228
Granted
Jan 17, 2012
Kind
B2
Abstract

In a data processing system each bus master of a plurality of bus masters communicates information via a system interconnect. A cache is associated with a predetermined bus master of the plurality of bus masters for storing information used by the predetermined bus master. A snoop queue is associated with the predetermined bus master for storing a plurality of snoop requests and selectively storing for each snoop request an indicator of a synchronization request that indicates a synchronization operation is to be performed by completing any previously issued snoop requests prior to or concurrently with completion of the synchronization operation. In one form the indicator is a synchronization request indicator flag for each entry in the snoop queue that indicates whether each entry participates in the synchronization operation associated with the synchronization request.

Claims (45)

1. A data processing system comprising:

a system interconnect;

a plurality of bus masters, each bus master of the plurality of bus masters communicating information via the system interconnect;

a cache associated with a predetermined bus master of the plurality of bus masters for storing information used by the predetermined bus master; and

a snoop queue associated with the predetermined bus master, the snoop queue storing a plurality of snoop requests, the snoop queue selectively storing for each snoop request an indicator of a synchronization request that indicates a synchronization operation is to be performed by completing any previously issued snoop requests prior to or concurrently with completion of the synchronization operation, the indicator comprising a synchronization request indicator flag for each entry in the snoop queue that indicates whether each entry participates in the synchronization operation associated with the synchronization request.

2. The data processing system of claim 1 wherein the snoop queue continues to receive and store snoop requests prior to completion of the synchronization operation, the indicator of the synchronization request for each such snoop request not being set to indicate participation in the synchronization operation.

3. The data processing system of claim 1 further comprising:

an arbiter coupled to the predetermined bus master, the cache associated therewith, and the snoop queue, the arbiter controlling access to the cache, the arbiter changing priority of servicing of a next entry of the snoop queue to be processed in response to the synchronization request indicator flag of the next entry of the snoop queue to be processed.

4. The data processing system of claim 3 wherein the arbiter elevates priority of servicing of the next entry of the snoop queue to be processed to be greater than a priority of the predetermined bus master in response to the synchronization request indicator flag of the next entry of the snoop queue to be processed.

5. The data processing system of claim 1 wherein the snoop queue further comprises:

a synchronization request boundary field within each snoop request, the synchronization request boundary field storing an indication of a synchronization request boundary, thereby avoiding utilizing an entry in the snoop queue to store a synchronization request.

6. The data processing system of claim 5 wherein when a synchronization request boundary field of an entry in the snoop queue has a first predetermined value, the entry corresponds to a location in the snoop queue of a most recently queued snoop request at the time a synchronization request is received, the synchronization request boundary field of the entry in the snoop queue corresponding to the synchronization request boundary being set to the first predetermined value when the synchronization request is received.

7. The data processing system of claim 6 further comprising:

control circuitry coupled to the snoop queue for controlling the processing of snoop queue requests and acknowledging completion of the synchronization request when a processed queue entry has its synchronization request boundary field asserted.

8. The data processing system of claim 1 further comprising:

control circuitry coupled to the cache for indicating a presence of an error encountered when processing the synchronization operation.

9. The data processing system of claim 8 wherein the control circuitry provides a snoop response that indicates a type of the error encountered when processing the synchronization operation.

10. The data processing system of claim 9 wherein the type of the error indicated by the snoop response further comprises at least one of an address tag error, a decoding error, a data error or a multiple cache hit error.

11. A method comprising:

coupling a plurality of bus masters via a system interconnect bus, each bus master communicating information via the system interconnect bus;

coupling a cache to a predetermined one of the plurality of bus masters;

storing information used by the predetermined one of the plurality of bus masters in the cache;

coupling a snoop queue to the cache; and

storing a plurality of snoop requests in the snoop queue, the snoop queue selectively storing for each snoop request an indicator of a synchronization request that indicates a synchronization operation is to be performed by completing any previously issued snoop requests prior to or concurrently with completion of the synchronization operation, the indicator comprising a synchronization request indicator flag for each entry in the snoop queue that indicates whether each entry participates in the synchronization operation associated with the synchronization request.

12. The method of claim 11 further comprising:

continuing to receive and store snoop requests in the snoop queue prior to completion of the synchronization operation, the indicator of the synchronization request for each such snoop request not being set to indicate participation in the synchronization operation.

13. The method of claim 11 further comprising:

coupling an arbiter to the predetermined bus master, the cache associated therewith, and the snoop queue;

controlling access to the cache from the predetermined bus master and the snoop queue; and

changing priority of servicing of a next entry of the snoop queue to be processed in response to the synchronization request indicator flag of the next entry of the snoop queue to be processed.

14. The method of claim 13 further comprising:

elevating priority of servicing of the next entry of the snoop queue to be processed to be greater than a priority of the predetermined bus master in response to the synchronization request indicator flag of the next entry of the snoop queue to be processed having a first value indicating said next entry participates in the synchronization operation associated with the synchronization request, and not elevating priority of servicing of said next entry of the snoop queue to be processed to be greater than a priority of the predetermined bus master in response to the synchronization request indicator flag of said next entry of the snoop queue to be processed having a second value indicating said next entry does not participate in the synchronization operation associated with the synchronization request.

15. The method of claim 11 further comprising:

providing a synchronization request boundary field for each snoop queue entry, the synchronization request boundary field storing an indication of a synchronization request boundary, thereby avoiding utilizing entries in the snoop queue to store synchronization requests.

16. The method of claim 11 further comprising:

controlling the processing of snoop queue requests and acknowledging completion of any synchronization requests when a processed queue entry has its synchronization request boundary field asserted.

17. A data processing system comprising:

a system interconnect;

a plurality of bus masters coupled to the system interconnect for communicating via the system interconnect, at least a predetermined one of the plurality of bus masters comprising a cache;

an arbiter coupled to the predetermined one of the plurality of bus masters and the cache for arbitrating access to the cache; and

a snoop queue and snoop control circuitry coupled to the cache and the arbiter, the snoop queue storing a plurality of snoop requests, each of the snoop requests having a synchronization request flag that becomes asserted upon receipt of a synchronization request, the synchronization request flag indicating whether each entry participates in a synchronization operation associated with the synchronization request, the arbiter elevating priority of the snoop queue for accesses to the cache in response to an entry at a head of the snoop queue having its synchronization request flag asserted.

18. The data processing system of claim 17 wherein the snoop control circuitry provides an encoded snoop status signal that indicates if any error occurred during processing of the synchronization operation and what type of error occurred.

19. The data processing system of claim 18 further comprising:

a synchronization request boundary field within each entry of the snoop queue, the synchronization request boundary field storing an indication of a synchronization request boundary, thereby avoiding storing synchronization requests in the snoop queue.

20. The data processing system of claim 17 wherein the snoop queue continues to receive and store snoop requests prior to completion of the synchronization operation, the synchronization request flag for each such snoop request not being set to indicate participation in the synchronization operation.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0757 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →